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Ensures all 16 data lines reach the video.
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c5ebf75351
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@ -263,9 +263,9 @@ class ConcreteMachine:
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}
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} else {
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if(cycle.operation & Microcycle::SelectByte) {
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video_->write(int(address), cycle.value->halves.low);
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video_->write(int(address), uint16_t(cycle.value->halves.low << cycle.byte_shift()));
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} else {
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video_->write(int(address), cycle.value->halves.high);
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video_->write(int(address), cycle.value->full);
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}
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}
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break;
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@ -233,7 +233,7 @@ uint8_t Video::read(int address) {
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return 0xff;
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}
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void Video::write(int address, uint8_t value) {
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void Video::write(int address, uint16_t value) {
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LOG("[Video] write " << PADHEX(2) << int(value) << " to " << PADHEX(2) << (address & 0x3f));
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address &= 0x3f;
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switch(address) {
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@ -247,8 +247,10 @@ void Video::write(int address, uint8_t value) {
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case 0x20: case 0x21: case 0x22: case 0x23:
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case 0x24: case 0x25: case 0x26: case 0x27:
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case 0x28: case 0x29: case 0x2a: case 0x2b:
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case 0x2c: case 0x2d: case 0x2e: case 0x2f:
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palette_[address - 0x20] = uint16_t((value & 0x777) << 5);
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break;
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case 0x2c: case 0x2d: case 0x2e: case 0x2f: {
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uint8_t *const entry = reinterpret_cast<uint8_t *>(&palette_[address - 0x20]);
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entry[0] = uint8_t((value & 0x700) >> 7);
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entry[1] = uint8_t((value & 0x77) << 1);
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} break;
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}
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}
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@ -42,7 +42,7 @@ class Video {
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void set_ram(uint16_t *);
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uint8_t read(int address);
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void write(int address, uint8_t value);
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void write(int address, uint16_t value);
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private:
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Outputs::CRT::CRT crt_;
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