From ffdf02c5df79dd49e679761501427d251346b0c1 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Thu, 18 Apr 2019 23:40:54 -0400 Subject: [PATCH] Adds MOVE XXX.lw, -(An) --- Processors/68000/Implementation/68000Storage.cpp | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Processors/68000/Implementation/68000Storage.cpp b/Processors/68000/Implementation/68000Storage.cpp index 4a49d2532..fcaef5c7b 100644 --- a/Processors/68000/Implementation/68000Storage.cpp +++ b/Processors/68000/Implementation/68000Storage.cpp @@ -2460,21 +2460,27 @@ struct ProcessorStorageConstructor { op(int(Action::Decrement2) | MicroOp::DestinationMask ); break; + case bw2(XXXl, PreDec): + op(Action::None, seq("np")); + case bw2(XXXw, PreDec): case bw2(d16An, PreDec): case bw2(d8AnXn, PreDec): case bw2(d16PC, PreDec): case bw2(d8PCXn, PreDec): - op( calc_action_for_mode(combined_source_mode) | MicroOp::SourceMask, + op( address_action_for_mode(combined_source_mode) | MicroOp::SourceMask, seq(pseq("np nr", combined_source_mode), { ea(0) }, !is_byte_access )); op(Action::PerformOperation); op(decrement_action | MicroOp::DestinationMask, seq("np nw", { a(destination_register) }, !is_byte_access)); break; + case l2(XXXl, PreDec): + op(Action::None, seq("np")); + case l2(XXXw, PreDec): case l2(d16An, PreDec): case l2(d8AnXn, PreDec): case l2(d16PC, PreDec): case l2(d8PCXn, PreDec): - op( calc_action_for_mode(combined_source_mode) | MicroOp::SourceMask, + op( address_action_for_mode(combined_source_mode) | MicroOp::SourceMask, seq(pseq("np nR+ nr", combined_source_mode), { ea(0), ea(0) } )); op(Action::PerformOperation); op(int(Action::Decrement2) | MicroOp::DestinationMask, seq("np") ); @@ -2497,8 +2503,6 @@ struct ProcessorStorageConstructor { op(int(Action::Decrement2) | MicroOp::DestinationMask); break; - // TODO: (xxx).l, (xxx).w - // // MOVE , (d16, An) // MOVE , (d8, An, Xn)