158 Commits

Author	SHA1	Message	Date
Thomas Harte	c9c1bde6e2	Switch to spinning on SID thread synchronisation.	2025-11-13 17:59:24 -05:00
Thomas Harte	989fb32fba	Fix clocking, do a linear attack phase.	2025-11-11 20:53:54 -05:00
Thomas Harte	4e86184955	Add local hack to ensure good flushing.	2025-11-11 14:40:13 -05:00
Thomas Harte	29235f1276	Adjust noise clocking, make it reactive to the test bit.	2025-11-11 09:16:43 -05:00
Thomas Harte	ae2936b9c3	Correct clock rate, triangle wave.	2025-11-10 22:35:13 -05:00
Thomas Harte	5e98e6502d	Attempt some basic voice details.	2025-11-08 21:54:41 -05:00
Thomas Harte	fe7a206fc5	Add an empty vessel of a SID.	2025-11-07 22:51:28 -05:00
Thomas Harte	32cd142629	Move point of templature to tube processors.	2025-11-07 17:27:52 -05:00
Thomas Harte	34992126a8	Allow installation of smaller ROMs.	2025-11-07 09:12:47 -05:00
Thomas Harte	d30d4e8f89	Add DFS 0.9 to the ROM catalogue.	2025-11-07 09:08:16 -05:00
Thomas Harte	2fe6e9c7fc	Reformulate to give ULA full IRQ/NMI/reset signalling duties.	2025-11-05 15:27:11 -05:00
Thomas Harte	ca23c04ba1	Propagate system reset to the tube.	2025-11-04 23:18:18 -05:00
Thomas Harte	4df01a7e0d	Ensure Z80 processes.	2025-11-04 17:38:46 -05:00
Thomas Harte	f4d15d0640	Mostly wire in a Z80 second processor.	2025-11-04 17:36:30 -05:00
Thomas Harte	f52315ac92	Further annotate.	2025-11-04 12:48:49 -05:00
Thomas Harte	cc88877109	Move tube holder out of line.	2025-11-04 12:46:15 -05:00
Thomas Harte	0113bcbea7	Include tube storage only when needed.	2025-11-04 09:20:28 -05:00
Thomas Harte	82a5d5116a	Expose processor option to macOS users, too.	2025-11-03 21:31:44 -05:00
Thomas Harte	62a6797ef3	The second processor appears to be a 65c02.	2025-11-03 21:06:34 -05:00
Thomas Harte	d4aa0799a9	Take a swing at reset.	2025-11-03 20:50:47 -05:00
Thomas Harte	fba2d37714	Correct flags, out-of-bounds writes.	2025-11-03 20:32:08 -05:00
Thomas Harte	e891697f88	Attempt full wiring.	2025-11-03 20:19:31 -05:00
Thomas Harte	c8130f9d6f	Begin FIFO wiring.	2025-11-03 17:27:48 -05:00
Thomas Harte	8abd837c8b	Ths host is now possibly awaiting tube activity.	2025-11-03 13:33:26 -05:00
Thomas Harte	5887e3e580	Provide ROM to second processor.	2025-11-03 13:17:35 -05:00
Thomas Harte	1994b2dc9f	Pay for a second processor, even if disconnected.	2025-11-03 13:12:19 -05:00
Thomas Harte	15f30995b1	Promote tube processor to template parameter.	2025-11-03 09:26:31 -05:00
Thomas Harte	e400aa200c	Slightly clean-up spacing.	2025-11-02 23:18:56 -05:00
Thomas Harte	49601e0a78	Introduce dynamic crop option to the BBC.	2025-10-30 09:09:53 -04:00
Thomas Harte	d27f0e3633	Declare that dynamic crop is an option.	2025-10-29 17:43:19 -04:00
Thomas Harte	fd7142f6a1	Comment out unused storage.	2025-10-29 12:28:09 -04:00
Thomas Harte	7e43b40415	Merge pull request #1617 from TomHarte/NoWarnings ... Resolve x86-related build warnings plus various whitespace deficiencies.	2025-10-29 12:16:53 -04:00
Thomas Harte	c5dc65fc61	Resolve various whitespace errors.	2025-10-29 11:50:56 -04:00
Thomas Harte	9ff09a45be	Allow is-1mhz decision to observe shortened addresses.	2025-10-28 21:32:09 -04:00
Thomas Harte	6cf87e3aa9	Ensure reads always achieve something.	2025-10-26 21:56:13 -04:00
Thomas Harte	45d0f101a7	Switch the BBC Micro to 6502Mk2.	2025-10-26 21:04:59 -04:00
Thomas Harte	4ee8f8564e	Catch unimplemented.	2025-10-21 13:40:23 -04:00
Thomas Harte	ff08c03bc5	Coral into building.	2025-10-21 13:31:48 -04:00
Thomas Harte	95dd430b0d	Shoehorn in an invocation.	2025-10-21 13:12:58 -04:00
Thomas Harte	309c58a93d	Include in CI builds; start implementation.	2025-10-19 23:29:27 -04:00
Thomas Harte	3f7e3e6d75	Use the ADT ROM if available.	2025-10-18 09:33:55 -04:00
Thomas Harte	e6de24557f	Set appropriate BBC bounds.	2025-10-15 23:39:55 -04:00
Thomas Harte	06629def62	Restore some fixed areas, work on API.	2025-10-14 22:51:36 -04:00
Thomas Harte	bc6cffa95c	Enable full dynamic selection again for the CPC.	2025-10-13 08:54:33 -04:00
Thomas Harte	2c483e7b97	Avoid nullptr dereference if there is no activity observer.	2025-10-08 17:42:57 -04:00
Thomas Harte	43cb91760a	Update SAA5050 row counter only in teletext mode.	2025-10-03 18:05:36 -04:00
Thomas Harte	7bb4d052d1	Correct collation test, to ensure no accidental buffer mixing.	2025-10-03 17:29:45 -04:00
Thomas Harte	7a90662c06	Merge branch 'master' into CompoundingTyper	2025-10-03 16:06:47 -04:00
Thomas Harte	ebfb215246	Support CB2 output strobe as triggering lightpen capture.	2025-10-03 15:39:16 -04:00
Thomas Harte	eb97e4e518	Reserve entire FF page; simplify logic.	2025-10-03 13:10:45 -04:00