Thomas Harte
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92e6dc64d4
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Merge branch 'master' into QueueDelegate
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2025-11-17 23:21:24 -05:00 |
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Thomas Harte
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ffababdb45
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With the Electron as a test bed, start to simplify audio class groups.
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2025-11-14 22:39:53 -05:00 |
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Thomas Harte
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c5c6c5ff72
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Add textbook filter construction.
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2025-11-12 22:06:48 -05:00 |
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Thomas Harte
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f232b179ed
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Partition channels into filtered and unfiltered, and apply no-op biquad.
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2025-11-12 17:40:14 -05:00 |
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Thomas Harte
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37152a1fad
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Start testing; I'm now unsure about pulses.
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2025-11-11 17:54:31 -05:00 |
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Thomas Harte
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fe7a206fc5
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Add an empty vessel of a SID.
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2025-11-07 22:51:28 -05:00 |
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Thomas Harte
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32cd142629
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Move point of templature to tube processors.
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2025-11-07 17:27:52 -05:00 |
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Thomas Harte
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ce32747973
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Record new version number.
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2025-11-07 12:39:46 -05:00 |
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Thomas Harte
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f562deca48
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Record new version number.
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2025-11-05 20:56:13 -05:00 |
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Thomas Harte
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f4d15d0640
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Mostly wire in a Z80 second processor.
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2025-11-04 17:36:30 -05:00 |
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Thomas Harte
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82a5d5116a
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Expose processor option to macOS users, too.
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2025-11-03 21:31:44 -05:00 |
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Thomas Harte
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1994b2dc9f
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Pay for a second processor, even if disconnected.
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2025-11-03 13:12:19 -05:00 |
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Thomas Harte
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0017bd6d0f
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Pull clock divider inside the loop.
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2025-11-03 12:49:30 -05:00 |
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Thomas Harte
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15f30995b1
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Promote tube processor to template parameter.
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2025-11-03 09:26:31 -05:00 |
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Thomas Harte
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37ca0e4f81
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Introduce one-directional FIFO.
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2025-11-02 23:18:56 -05:00 |
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Thomas Harte
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c4afbf8f2e
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Recast middle button as tertiary.
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2025-11-02 23:12:38 -05:00 |
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Thomas Harte
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112aff9887
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SDL: change mouse button indices.
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2025-11-02 23:12:38 -05:00 |
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Thomas Harte
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a8207ded4f
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Regularise mouse-event clock.
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2025-11-02 23:12:38 -05:00 |
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Thomas Harte
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49601e0a78
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Introduce dynamic crop option to the BBC.
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2025-10-30 09:09:53 -04:00 |
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Thomas Harte
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e75c27cb66
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Add macOS UI to dynamic cropping option, apply at runtime to CPC.
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2025-10-29 21:21:21 -04:00 |
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Thomas Harte
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c5dc65fc61
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Resolve various whitespace errors.
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2025-10-29 11:50:56 -04:00 |
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Thomas Harte
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e688d87c22
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Move negative and zero into private storage.
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2025-10-28 18:23:16 -04:00 |
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Thomas Harte
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55c59e6164
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Start hiding Flags implementation.
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2025-10-28 17:24:53 -04:00 |
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Thomas Harte
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c8c4c99f09
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Incorporate IRQ timing test; accept that it must be tested within the access macro.
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2025-10-27 21:32:52 -04:00 |
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Thomas Harte
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3673144a44
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Enable all tests.
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2025-10-25 09:00:55 -04:00 |
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Thomas Harte
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213f9850e7
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Add WDC65C02 decoder.
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2025-10-24 23:41:55 -04:00 |
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Thomas Harte
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378bffbf84
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Implement BBR/BBS.
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2025-10-24 23:37:18 -04:00 |
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Thomas Harte
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c291d5313d
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Fix PLX.
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2025-10-24 22:22:05 -04:00 |
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Thomas Harte
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1f6f665639
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Exclude all 65c02 NOPs from timing checks.
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2025-10-24 22:19:15 -04:00 |
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Thomas Harte
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e81233c586
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Implement JMP (abs,x).
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2025-10-24 22:16:36 -04:00 |
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Thomas Harte
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6095936354
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Exclude tests I believe faulty.
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2025-10-24 21:54:23 -04:00 |
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Thomas Harte
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d267571dc6
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Add spot to fill in Synertek mappings.
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2025-10-24 12:13:10 -04:00 |
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Thomas Harte
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3c34aa6696
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Setup to test 65c02s.
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2025-10-24 12:07:40 -04:00 |
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Thomas Harte
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79ab1d8cb1
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Implement final SHA.
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2025-10-23 13:42:23 -04:00 |
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Thomas Harte
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7cd20f5d12
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Add all absolute-indexed oddities.
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2025-10-23 13:39:03 -04:00 |
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Thomas Harte
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5396d751e1
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Support SHX and a SHA.
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2025-10-23 13:27:55 -04:00 |
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Thomas Harte
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0791bce338
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Fix everything other than the oddball SHA/SHX/SHY/SHS.
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2025-10-22 22:12:32 -04:00 |
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Thomas Harte
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b35a55a658
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Implement jamming.
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2025-10-21 23:16:59 -04:00 |
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Thomas Harte
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72f133f31b
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Do enough work to verify BRK.
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2025-10-21 22:07:35 -04:00 |
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Thomas Harte
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af4a8f6d9c
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Add enough to attempt to run processor tests.
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2025-10-21 21:30:42 -04:00 |
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Thomas Harte
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95dd430b0d
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Shoehorn in an invocation.
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2025-10-21 13:12:58 -04:00 |
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Thomas Harte
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2d6a0b3ed0
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Add a branch to nowhere.
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2025-10-20 23:08:04 -04:00 |
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Thomas Harte
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fde0e2434e
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Attempt to transcribe base 6502 instruction set.
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2025-10-20 22:50:14 -04:00 |
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Thomas Harte
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309c58a93d
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Include in CI builds; start implementation.
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2025-10-19 23:29:27 -04:00 |
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Thomas Harte
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700bd0ddd4
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Merge branch 'master' into Turbo6502
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2025-10-19 22:21:19 -04:00 |
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Thomas Harte
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bd5a2f240d
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Record version number.
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2025-10-19 19:51:06 -04:00 |
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Thomas Harte
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294893b7da
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Start transferring 6502 precepts.
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2025-10-18 22:31:00 -04:00 |
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Thomas Harte
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676b1f6fdc
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Adopt brackets, as is now a macro.
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2025-10-17 21:38:12 -04:00 |
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Thomas Harte
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406ef4e16c
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Record new version number.
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2025-10-17 21:00:11 -04:00 |
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Thomas Harte
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bd8287fda3
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Resolve obstructive warning.
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2025-10-17 15:21:47 -04:00 |
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