Commit Graph

11650 Commits

Author SHA1 Message Date
Thomas Harte 002e235d90 Force RGB mode. 2024-04-04 22:02:47 -04:00
Thomas Harte 7d8a364658 Reimplement LDM and STM. 2024-04-04 21:59:18 -04:00
Thomas Harte 41c471ca52 Add a force-user-aware accessor. 2024-04-04 20:17:44 -04:00
Thomas Harte dd127f64fe Simplify range. 2024-04-03 07:23:14 -04:00
Thomas Harte b19dcfd6dc Take another run at shifts. 2024-04-02 21:57:46 -04:00
Thomas Harte 55369464ad Add a by-eye crop. A better answer will come. 2024-04-01 22:10:05 -04:00
Thomas Harte 609c117267 Switch to English RISC OS. 2024-04-01 21:44:42 -04:00
Thomas Harte 3b62a2fe7a Restrict video buffer to first 512kb. 2024-04-01 21:39:10 -04:00
Thomas Harte 7c9715f00c Change mind about carry behaviour. 2024-04-01 21:38:44 -04:00
Thomas Harte 7de92a9457 Slightly clean up shift code. 2024-04-01 21:24:49 -04:00
Thomas Harte 0866caf934 Flaws remain, but acknowledge that pixel rate is double. 2024-04-01 10:48:20 -04:00
Thomas Harte 914b88d115 Fix non-debug build. 2024-03-31 19:17:55 -04:00
Thomas Harte cc122a7a68 Add an SWI count, to aid in logging. 2024-03-31 18:18:26 -04:00
Thomas Harte 31979649c6 As it continues to swell, factor out the junk. 2024-03-31 18:15:48 -04:00
Thomas Harte 335d13d06d Mildly improve logging, define a few more ROMs. 2024-03-30 21:49:21 -04:00
Thomas Harte ec785f3a8a Add URL as comment. 2024-03-30 20:54:17 -04:00
Thomas Harte 1f83a5425e Complete list of all currently-failing SWIs.
... a lot of which are probably failing correctly, i.e. they're appropriately signalling.
2024-03-30 20:48:47 -04:00
Thomas Harte 4882d6d0f2 Start adding SWI detail. 2024-03-30 15:16:48 -04:00
Thomas Harte 722743659b Add missing space. 2024-03-29 21:52:57 -04:00
Thomas Harte 6e64a79b52 Log failed SWIs. 2024-03-29 21:31:33 -04:00
Thomas Harte 8a6bf84cff Keyboard: log more, ignore unrecognised commands. 2024-03-29 20:54:07 -04:00
Thomas Harte a0fdd8f4eb Resolve magic constant. 2024-03-28 22:15:27 -04:00
Thomas Harte bda1783624 Make new guess at non-byte IOC reads. 2024-03-28 22:10:49 -04:00
Thomas Harte 2a14557478 Be more disciplined about errant accesses. 2024-03-28 21:31:07 -04:00
Thomas Harte 0ddbc67b1f Switch to default CMOS RAM obtained from RISC OS itself. 2024-03-28 21:23:49 -04:00
Thomas Harte ffb5149890 Reinstate real CMOS RAM results. 2024-03-28 14:27:07 -04:00
Thomas Harte bb339d619f Eliminate trace test; I don't think I'm going to work it through. 2024-03-28 14:23:00 -04:00
Thomas Harte 2ed11877e8 Determine a couple of further exclusions. 2024-03-28 14:11:41 -04:00
Thomas Harte ea6b83815b Add a further category of exclusions. 2024-03-28 14:01:37 -04:00
Thomas Harte 740b0e35d5 Completely bypass ignored tests. 2024-03-28 11:28:37 -04:00
Thomas Harte 2e7c1acb88 Add note on confusion. 2024-03-28 10:34:46 -04:00
Thomas Harte 4fcb85d132 Cleave off most remaining reasons for failure. 2024-03-28 10:32:27 -04:00
Thomas Harte f175dcea58 Hack in some more potential debugging help. 2024-03-27 22:37:37 -04:00
Thomas Harte c04c708a9d Trade some depth for breadth. 2024-03-27 22:37:10 -04:00
Thomas Harte f4cf1e5313 Attempt to cleave by broad reason. 2024-03-27 22:36:37 -04:00
Thomas Harte 0e17f382a1 Capture further detail. 2024-03-27 22:36:03 -04:00
Thomas Harte f38bca37a2 Take another run at MEMC.
I hadn't spotted that it is valid to map different logical pages to the same physical page with different protection levels.
2024-03-27 10:44:40 -04:00
Thomas Harte 166793ebe6 Reduce I2C chatter. 2024-03-26 21:54:42 -04:00
Thomas Harte 8b04d0e3ef Enhance and better-document I2C states. 2024-03-26 21:52:29 -04:00
Thomas Harte a3931674dc Seemingly navigate I2C correctly. 2024-03-26 21:33:46 -04:00
Thomas Harte bd4ef5ec57 Switch to acknowledgement-after. 2024-03-26 14:06:11 -04:00
Thomas Harte 3ba12630ab Quieten. 2024-03-26 12:27:37 -04:00
Thomas Harte 342d90c929 Advance CMOS/I2C to a seemingly-valid read. 2024-03-26 12:24:24 -04:00
Thomas Harte 9078fc994b Try to formalise I2C events. 2024-03-25 22:10:52 -04:00
Thomas Harte f46af4b702 OS 3.11 seems to be able to get into BASIC. 2024-03-25 22:10:35 -04:00
Thomas Harte b112987556 Do well enough at other colour depths. 2024-03-25 22:09:55 -04:00
Thomas Harte fc880ac130 Double down on trans mode. 2024-03-25 21:32:56 -04:00
Thomas Harte a2d95cb982 Shuffle notes. 2024-03-25 21:31:59 -04:00
Thomas Harte d2776071e4 Speed up debug mode. 2024-03-25 21:31:33 -04:00
Thomas Harte 72a645ec1e Fix trans; take further crack at MEMC permissions. 2024-03-25 15:50:59 -04:00