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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-18 01:07:58 +00:00
Commit Graph

7 Commits

Author SHA1 Message Date
Thomas Harte
1c154131f9 Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate. 2019-10-29 22:36:29 -04:00
Thomas Harte
776b819a5a Adds the SCSI bus as an Activity::Source. 2019-09-19 19:31:22 -04:00
Thomas Harte
962275c22a Removes clock for NCR 5380.
It doesn't have one in real life, and now can live off the time counting that occurs on the SCSI bus.
2019-09-18 20:17:47 -04:00
Thomas Harte
318cdb41ea Adds SCSI bus clocking to the Macintosh, and fixes its internal counting. 2019-09-02 16:03:33 -04:00
Thomas Harte
2f8e31bc8b Takes a first bash at implementing the new SCSI::Bus timing infrastructure. 2019-09-02 13:00:01 -04:00
Thomas Harte
310c722cc0 Starts a transition to bus-level knowledge of SCSI-specific bus timing thresholds.
The idea being that bus attachees need not all count time for themselves. They can be very plain finite state machines.

New semantics are not yet implemented within the Bus. The plan is to do that, remove the internal counting of time within the NCR, then adjust the Target to be more explicitly stateful.
2019-08-31 21:44:22 -04:00
Thomas Harte
faec516a2c Starts pushing towards figuring out a proper infrastructure for mass storage. 2019-08-21 23:22:58 -04:00