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Author	SHA1	Message	Date
C.W. Betts	05d4274019	Remove LSItemContentTypes: they should be unique identifiers, not generic types like public.item or public.data. ... This can result in strange icons showing up in the wrong places. Also added a category type.	2018-09-07 16:39:52 -06:00
Thomas Harte	0526ac2ee2	Slightly increases const correctness. ... The converters from source data to output pixels do not modify the source data. It's a shame there's no `restrict` in C++.	2018-09-05 11:36:40 -04:00
Thomas Harte	6725ee2190	Merge pull request #539 from TomHarte/40ColumnTextCorruption ... Corrects 40-column alternative text mode corruption	2018-09-05 10:27:09 -04:00
Thomas Harte	8b661fb90f	Introduces an extra level of indirection for text mapping.	2018-09-05 10:26:08 -04:00
Thomas Harte	dab7d3db1b	Merge branch 'master' into 40ColumnTextCorruption	2018-08-30 20:24:47 -04:00
Thomas Harte	1cba3d48d9	Merge pull request #538 from TomHarte/AppleDecodingAgain ... Correction: 0xc011 et al get the keyboard value in bits 0 to 6...	2018-08-30 20:19:48 -04:00
Thomas Harte	d53b38ec7e	Correction: 0xc011 et al get the keyboard value in bits 0 to 6 and the switch value in bit 7.	2018-08-30 20:18:36 -04:00
Thomas Harte	5d0f47eda2	Merge pull request #536 from TomHarte/AppleDecoding ... Adds mirrors for keyboard input and the audio toggle.	2018-08-27 21:14:48 -04:00
Thomas Harte	2e04c4442c	Adds mirrors for keyboard input and the audio toggle.	2018-08-27 21:14:21 -04:00
Thomas Harte	f639cdc8ad	Merge pull request #535 from TomHarte/DSKFixes ... Corrects Apple DSK track length, inter-track skew, and Pro-DOS volume number.	2018-08-27 21:07:11 -04:00
Thomas Harte	71ec7624ca	Corrects Apple DSK track length, inter-track skew, and Pro-DOS volume number.	2018-08-27 20:56:25 -04:00
Thomas Harte	0599d9602e	Ensures no out-of-bounds accesses to inverses on a IIe.	2018-08-26 23:02:31 -04:00
Thomas Harte	234bef2a88	Adds default to make it explicit that fetch_address is initialised.	2018-08-24 22:26:03 -04:00
Thomas Harte	adb574e1cd	Merge pull request #529 from TomHarte/AppleDelay ... Corrects Apple II video defects	2018-08-24 22:11:41 -04:00
Thomas Harte	1f491e764e	Nudges visible area slightly to the right.	2018-08-24 22:08:11 -04:00
Thomas Harte	114a43a662	Corrects improper indexing for byte shift.	2018-08-24 21:58:43 -04:00
Thomas Harte	5547c39c91	Corrects documentation.	2018-08-24 20:06:40 -04:00
Thomas Harte	97a89aaf4d	Factors out the stuff of deferred action interleaving, as I suspect it'll come in handy.	2018-08-24 20:04:26 -04:00
Thomas Harte	61e46399dc	About face! There should be no delay on serialisation, but a delay on interpretation-affecting soft switches.	2018-08-22 21:56:45 -04:00
Thomas Harte	e802f6ecc2	Rearranges draw loop around a fixed-size 568-sample line buffer.	2018-08-19 22:31:04 -04:00
Thomas Harte	4209f0e044	Moves memory collection into a separate loop.	2018-08-18 21:54:24 -04:00
Thomas Harte	33576aa2c4	Uses const to ensure output_* are properly constrained.	2018-08-18 21:36:48 -04:00
Thomas Harte	17bf1a64bf	Moves the stuff of generating pixels out of the main loop.	2018-08-18 18:44:31 -04:00
Thomas Harte	f8d46f8f3d	Merge branch 'master' into AppleDelay	2018-08-18 14:11:21 -04:00
Thomas Harte	8787d85e64	Eliminates #undefs as being (i) unnecessary, now this is a source file; and (ii) incomplete in any case.	2018-08-17 22:24:42 -04:00
Thomas Harte	7f0f17f435	Merge pull request #523 from TomHarte/Further65C02 ... Further corrects 65C02 behaviour	2018-08-17 21:58:38 -04:00
Thomas Harte	0e7f54f375	Implements STP and WAI, and ensures all unimplemented 65C02 instructions are NOP for all 65C02s.	2018-08-17 21:49:06 -04:00
Thomas Harte	b3bdfa9f46	Corrected: it's three-cycle 65C02 branches that ignore interrupts, not two.	2018-08-16 20:47:49 -04:00
Thomas Harte	592ec69d36	Causes the 65C02 not to accept interrupts immediately after untaken branches.	2018-08-15 22:42:04 -04:00
Thomas Harte	60e00ddd02	Correction: the test for not skipping an operand fetch requires a 65C02.	2018-08-15 22:07:17 -04:00
Thomas Harte	6806193dc2	Ensures that "Read/Modify/Write instructions absolute indexed in same page" take only six cycles on a 65C02.	2018-08-15 19:17:37 -04:00
Thomas Harte	c35dca783f	Ensures that page-crossing indexing no longer causes an extra read of an invalid address on the 65C02. ... It rereads the last byte of the instruction stream instead.	2018-08-15 18:47:53 -04:00
Thomas Harte	901e0d65b9	Documents all 6502 micro-operations. ... Also makes sure 1-cycle NOPs really, definitely are one cycle only on a 65C02 and eliminates OperationCopyOperandFromA as a redundant copy of OperationSTA.	2018-08-14 22:17:53 -04:00
Thomas Harte	ddf45a0010	Ensures NMI and RST reset D on 65C02s.	2018-08-14 19:49:14 -04:00
Thomas Harte	1eca4463b3	Ensures NMI can no longer usurp BRK on 65C02s.	2018-08-14 19:33:48 -04:00
Thomas Harte	be01203cc1	Starts to expand the range of supported 6502s. ... This fully implements the NES 6502 because, well, it's virtually no extra work, and ensures that RDY takes effect on write cycles on 65C02s.	2018-08-13 22:17:22 -04:00
Thomas Harte	4d1d19a464	Introduces an intermediate buffer for Apple II video data.	2018-08-12 20:36:08 -04:00
Thomas Harte	760817eb3b	Merge pull request #521 from TomHarte/AppleVideo ... Fixes Apple II double low resolution graphics	2018-08-11 23:20:40 -04:00
Thomas Harte	cb47575860	Eliminates stdout chatter.	2018-08-11 22:57:54 -04:00
Thomas Harte	434d184503	Corrects deserialisation order in double low res mode.	2018-08-11 22:53:06 -04:00
Thomas Harte	7374c665e8	Corrects regression in video flushing.	2018-08-11 19:57:39 -04:00
Thomas Harte	10c930a59d	Merge pull request #520 from TomHarte/EnhancedIIe ... Adds Enhanced IIe emulation.	2018-08-11 19:42:47 -04:00
Thomas Harte	60ab6f0c2a	Entrusts IIe-esque character logic fully to the ROM.	2018-08-11 18:45:39 -04:00
Thomas Harte	a13eb351da	Implements the Enhanced IIe, other than some text selection errors.	2018-08-11 10:26:30 -04:00
Thomas Harte	4b91910fab	Removes erroneous addition.	2018-08-10 23:27:09 -04:00
Thomas Harte	f46d52364c	Merge pull request #519 from TomHarte/65C02 ... Makes an initial pass at 65C02 emulation	2018-08-10 23:21:45 -04:00
Thomas Harte	878c63dcd2	Ensures ADC and SBC decimal take an extra cycle on the 65C02.	2018-08-10 22:52:55 -04:00
Thomas Harte	261fb3d4f8	Implements proper test for ADC/SBC 65C02 NZ, though not yet the proper timing. ... This gets Klaus Dorman's test to pass.	2018-08-10 22:42:35 -04:00
Thomas Harte	b63e0cff72	Improves has-completed test.	2018-08-10 22:27:01 -04:00
Thomas Harte	5d6e479338	Implements RMB and SMB, and fixes SBC (zero).	2018-08-10 22:13:51 -04:00