1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-27 01:31:42 +00:00
Commit Graph

3626 Commits

Author SHA1 Message Date
Thomas Harte
074b4c3500 Eliminates repeating cause of misuse.
Raises the question as to whether an async task queue should be required at construction; let's see how things look as the project develops.
2018-04-21 15:01:18 -07:00
Thomas Harte
5968c9a391 Corrects Apple II output audio. 2018-04-21 14:56:50 -07:00
Thomas Harte
0a0d81cd5a
Merge pull request #415 from TomHarte/SconsOmissions
Updates SConstruct file to include the Apple II.
2018-04-20 11:00:00 -04:00
Thomas Harte
75e9c3678b Adds the missing Apple II static analyser. 2018-04-20 10:58:57 -04:00
Thomas Harte
aebe8a64a2 Removes empty printf. 2018-04-20 10:58:23 -04:00
Thomas Harte
1aacf437b5 Adds omitted paths to SConstruct. 2018-04-20 10:56:59 -04:00
Thomas Harte
7e8e3fdd39
Merge pull request #414 from TomHarte/AppleII
Adds provisional Apple II emulation
2018-04-19 22:31:02 -04:00
Thomas Harte
b8ae283049 Implements correct text inverse/flashing. 2018-04-19 22:14:22 -04:00
Thomas Harte
6621e54952 Shortens the name for the Electron tab, owing to limited space. 2018-04-19 20:54:16 -04:00
Thomas Harte
e03a403a51 Adds exposition. 2018-04-19 20:41:09 -04:00
Thomas Harte
ba43b3e6b8 Reverses bit order of graphics stream; apparently the ROM is backwards. 2018-04-19 20:39:38 -04:00
Thomas Harte
b4a2d1395c Ensures left and right cursor keys work. 2018-04-18 22:23:31 -04:00
Thomas Harte
f5ae8d0f79 Attempts to be more rigorous about clock rates. 2018-04-18 21:52:22 -04:00
Thomas Harte
5f1c210746 Simplifies and corrects low-resolution colour generation.
Possibly disproving the premise for this whole experiment, all colours seem immediately to work correctly. Hmmm.
2018-04-18 21:41:11 -04:00
Thomas Harte
f6c2f6e896 Slightly adjusts colour burst logic to fix transition lines in mixed mode. 2018-04-18 20:39:12 -04:00
Thomas Harte
6547560e52 Gives the CRT the ability to move iCoordinate multiplication outside of the fragment loop.
That resolves precision issues, as were plaguing the Apple II.
2018-04-18 19:29:03 -04:00
Thomas Harte
a167e3849b Allows multiple ROMs to be inserted into the Electron. 2018-04-18 18:13:30 -04:00
Thomas Harte
f22c23cb4c Attempts to bring audio to the Apple II.
By factoring the audio toggle out from the MSX.
2018-04-17 22:28:13 -04:00
Thomas Harte
a07c99d778 Completes first draft of Apple II video hardware. 2018-04-17 22:04:02 -04:00
Thomas Harte
1c605d58e3 Removes the CRT requirement for an integral relationship between cycles and samples. 2018-04-16 20:00:56 -04:00
Thomas Harte
6a79ce9eb1 Adds enough to the Apple II's video that I can see what's going on with soft switches. 2018-04-15 21:55:26 -04:00
Thomas Harte
465c38f03c Extends the keyboard protocol and adds keyboard input to the Apple II. 2018-04-15 21:11:30 -04:00
Thomas Harte
be05d51e07 Now gives something a lot like the proper character output. 2018-04-15 20:31:04 -04:00
Thomas Harte
9bc470027e Put enough in place to get a visual representation of video memory.
Not the correct one, and so as to indicate that the machine isn't booting, surprisingly.
2018-04-15 19:35:08 -04:00
Thomas Harte
335c633884 Retrenches temporarily to full 8bpp output; introduces extra half a colour cycle of pause. 2018-04-15 18:54:05 -04:00
Thomas Harte
cd26f11818 Fixes documentation misstatement. 2018-04-15 18:00:51 -04:00
Thomas Harte
abe47b6ed8 Makes first attempt at a stable display area. Not entirely successful. 2018-04-15 18:00:40 -04:00
Thomas Harte
61659faeaa Adds the necessary call-outs to allow implementation of video generation. 2018-04-15 15:13:07 -04:00
Thomas Harte
71adb964e5 The Apple II now has a functioning processor, ROM and RAM. 2018-04-14 21:41:26 -04:00
Thomas Harte
e599e65087 Switches to use of the TargetList typedef wherever possible. 2018-04-14 19:46:38 -04:00
Thomas Harte
7efee9b52b Does the bare minimum to create a class skeleton for Apple II implementation. 2018-04-14 19:46:15 -04:00
Thomas Harte
079dc671e1 Rationalises per-machine static analyser call pattern, and adds Apple II as an option. 2018-04-14 12:12:12 -04:00
Thomas Harte
a32a7d1374
Merge pull request #413 from TomHarte/VicPAL
Adjusts PAL Vic timing.
2018-04-12 21:38:18 -04:00
Thomas Harte
467cd5450f Adjusts PAL Vic timing. 2018-04-12 21:12:09 -04:00
Thomas Harte
1580874a55
Merge pull request #412 from TomHarte/VideoRestriction
Reintroduces accessible memory restrictions on the VIC.
2018-04-11 22:07:42 -04:00
Thomas Harte
15f7cbe8c1 Corrects capitalisation. 2018-04-11 22:06:50 -04:00
Thomas Harte
428b6145fa Converts 6560 to more project normative templated form. 2018-04-11 22:00:42 -04:00
Thomas Harte
3ad0b31db8 Limits regions accessible to the 6560 to those built into the machine. 2018-04-11 21:35:23 -04:00
Thomas Harte
8d4d5d1f46
Merge pull request #410 from TomHarte/VicNTSC
Corrects NTSC VIC raster register timing.
2018-04-11 10:29:46 -04:00
Thomas Harte
4c8a68c6a4 Implements late-0 with proper timing, and NTSC interlaced raster count timing. 2018-04-11 08:00:37 -04:00
Thomas Harte
0b4b6f4aec Tweaks luminances and reintroduces late-to-zero line counts. 2018-04-10 23:05:18 -04:00
Thomas Harte
bb4db6b382 Ensures that 'choose' responds to enter. 2018-04-08 18:52:46 -04:00
Thomas Harte
94b1c37fb2 Slightly simplifies bus decoding. 2018-04-08 18:51:37 -04:00
Thomas Harte
cf6f6c5c15 Eliminates the full_frame_counter_ and slightly tweaks NTSC raster timing. 2018-04-08 18:51:20 -04:00
Thomas Harte
f541986333 Switches to more normative preincrement. 2018-04-08 18:50:42 -04:00
Thomas Harte
44513d6912 Ensures a 1540 is requested if any disks are present. 2018-04-08 17:37:39 -04:00
Thomas Harte
b20cbcd5fe Causes the Vic-20 to obey its own has_c1540 flag. 2018-04-08 17:35:02 -04:00
Thomas Harte
1c5972f7b0 Ensures NTSC raster count rollover; previously it was positing a line '261' for half of '0'. 2018-04-08 16:18:41 -04:00
Thomas Harte
28947bb3c4
Merge pull request #409 from TomHarte/BitShader
Switches ZX80/81 video bit unpacking to the GPU.
2018-04-08 10:35:43 -04:00
Thomas Harte
865c47a1ac Names the magic constants. 2018-04-08 10:35:07 -04:00