Thomas Harte
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9bc2b48d9b
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Found a form I like for indexed addressing, applying it only where obvious for now. Which eliminates more than a couple of hundred of remaining failures.
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2017-05-26 23:23:33 -04:00 |
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Thomas Harte
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e4e71a1e5f
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Switched back to descriptive failures, but put a cap on them.
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2017-05-25 21:08:24 -04:00 |
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Thomas Harte
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fba5af280e
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Shortened failure message, at least for now.
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2017-05-25 21:05:47 -04:00 |
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Thomas Harte
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2cadc706e2
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Now runs FUSE tests, albeit testing only a subset of the results. But enough to get started.
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2017-05-25 21:00:33 -04:00 |
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Thomas Harte
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3c6f63abcc
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Started towards running the FUSE tests. Just need to deal with the memory segments.
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2017-05-25 19:12:59 -04:00 |
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Thomas Harte
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00cd7e7e9c
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After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.
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2017-05-25 18:20:13 -04:00 |
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Thomas Harte
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055c860b43
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Sealed off RegisterState as immutable, and started trying to parse the .expected file.
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2017-05-23 22:32:36 -04:00 |
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Thomas Harte
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454c8628c3
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Implemented an additional constructor for RegisterStates, pulling it out into file-level scope and implementing Equatable.
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2017-05-23 22:05:33 -04:00 |
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Thomas Harte
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a23a6db4d6
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Tidied up, creating a holder for RegisterState and giving it deserialisation logic. This makes sense because a register state will also need to be taken from the outputScanner, and from the machine.
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2017-05-23 08:13:24 -04:00 |
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Thomas Harte
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6575091a78
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Fixed Z80's ownership of its fetch-decode-execute program, its habit of scheduling invalidly when hitting an unrecognised operation and the test machine's habit of dereferencing invalidly.
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2017-05-22 21:50:34 -04:00 |
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Thomas Harte
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9e25d014d2
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Made an attempt to log bus activity for comparison with FUSE results.
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2017-05-22 19:49:38 -04:00 |
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Thomas Harte
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41d5dd8679
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Added a memory access delegate to the Z80 all-ram processor, to allow access patterns to be captured.
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2017-05-22 19:24:11 -04:00 |
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Thomas Harte
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22afa509ca
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Got to a parsing and towards an attempt to run FUSE tests.
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2017-05-22 19:14:46 -04:00 |
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Thomas Harte
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3fb3cc8269
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Got explicit about encodings.
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2017-05-21 22:53:06 -04:00 |
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Thomas Harte
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e3e461d7cb
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Added a test class for running the FUSE tests. With nothing much in it.
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2017-05-21 22:49:24 -04:00 |
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Thomas Harte
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c16fccb317
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Fixed file names.
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2017-05-21 22:43:07 -04:00 |
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Thomas Harte
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b9cffdf2bd
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Imported the FUSE tests.
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2017-05-21 22:42:20 -04:00 |
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Thomas Harte
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d910405648
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Added enough infrastructure to be able to react to the two CP/M calls this cares about.
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2017-05-19 21:53:39 -04:00 |
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Thomas Harte
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62b432c046
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Added the concept of a trap handler to the all-RAM processor and exposed it via the test Z80 classes.
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2017-05-19 21:20:28 -04:00 |
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Thomas Harte
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a3dafa9056
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Abbreviated uses of enumerations.
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2017-05-17 21:44:08 -04:00 |
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Thomas Harte
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64d6ee1be5
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Adjusted slightly to adapt to latest Swift warnings.
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2017-05-17 07:49:48 -04:00 |
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Thomas Harte
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1378ab7278
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Ensured initial program counter and stack pointer are correct for Zexall, fixed the Z80 to use a compile-time polymorphic call for bus access.
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2017-05-17 07:36:06 -04:00 |
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Thomas Harte
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87a021ec2d
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Made further attempt to get as fas as having the Z80 attempt to do something.
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2017-05-16 22:19:40 -04:00 |
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Thomas Harte
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189317b80c
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Added enough of a Z80 test machine to bridge up into Swift.
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2017-05-16 22:05:42 -04:00 |
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Thomas Harte
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4f0775cc7c
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Imported the Zexall.com tester, as a first thing to throw at the Z80 to be.
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2017-05-16 21:37:09 -04:00 |
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Thomas Harte
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df80c37adb
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Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.
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2017-05-15 08:18:57 -04:00 |
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Thomas Harte
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0808e9b6fb
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Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
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2017-05-14 22:08:15 -04:00 |
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Thomas Harte
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a6897ebde0
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Added an attempt to distinguish the MegaBoy (now with proper capitalisation) and a test for it.
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2017-03-13 20:43:12 -04:00 |
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Thomas Harte
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582da14a14
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Added an enumerated type and detection of Pitfall 2.
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2017-03-13 08:15:36 -04:00 |
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Thomas Harte
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8e147444d5
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Added a readme, as is traditional for folders I'm excluding from Git.
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2017-03-12 22:16:12 -04:00 |
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Thomas Harte
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2c07cce282
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Had the wrong paging scheme listed for Robot Tank and Thwocker. Better to get this right before trying to come up with a test for the Activision stack scheme.
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2017-03-12 21:03:10 -04:00 |
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Thomas Harte
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597bd97b01
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Corrected two more table errors.
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2017-03-12 15:46:25 -04:00 |
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Thomas Harte
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38de5300e5
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Elevator Action seemingly uses a Super Chip.
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2017-03-12 15:43:42 -04:00 |
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Thomas Harte
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146f3ea0f5
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Fixed: Crystal Castles is 16kb.
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2017-03-12 15:39:07 -04:00 |
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Thomas Harte
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78213f1e95
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Fixed a couple more table entries, introduced per-size tests (plus a catch-all), to speed up the development/testing cycle.
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2017-03-12 15:35:36 -04:00 |
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Thomas Harte
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de347ad7c8
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Improved CBS RAM Plus and Super Chip detection exclusion, reducing error count to 15.
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2017-03-12 14:03:17 -04:00 |
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Thomas Harte
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a4bba8a92e
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Made a couple of lookup table fixes and corrected RAM region detection windows; failures now down to 19.
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2017-03-11 23:18:30 -05:00 |
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Thomas Harte
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fcacfc2726
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Tidied up spacing, slightly.
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2017-03-11 23:01:42 -05:00 |
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Thomas Harte
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bab464e765
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I'm far from confident, but this should reduce the deviations close to those that result from mistakes by the static analyser, rather than table errors.
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2017-03-11 22:58:11 -05:00 |
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Thomas Harte
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2879763c34
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Reduced to 84 failures through more accurate tabulation.
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2017-03-11 21:52:52 -05:00 |
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Thomas Harte
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ea2ea30193
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Fleshed entire table out with most common values. Exceptions now to fix.
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2017-03-11 21:11:25 -05:00 |
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Thomas Harte
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608569cc48
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Typed out all the 'A's that I am aware of. So about 5% done.
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2017-03-11 20:58:38 -05:00 |
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Thomas Harte
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c7e973aab4
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Extended test set a little, corrected current failures.
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2017-03-11 20:51:25 -05:00 |
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Thomas Harte
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443d57bc32
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Slimmed output and added first six tests. Acid Drop fails since I'm not yet declaring Atari 16k and Atari 32k.
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2017-03-11 20:43:19 -05:00 |
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Thomas Harte
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57ec756f5b
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Started speccing out a unit test for Atari ROM analysis.
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2017-03-11 20:33:58 -05:00 |
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Thomas Harte
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d3257c345a
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Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.
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2017-03-04 17:00:28 -05:00 |
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Thomas Harte
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e09b76bf32
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Fixed 'same value, then immediate increment, then proper counting increments' behaviour and ensured it takes one cycle to commit a value. Adjusted tests to match.
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2017-03-04 15:57:54 -05:00 |
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Thomas Harte
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dd17459687
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Added my first failing test: delay is incorrect when resetting outside of the play area.
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2017-02-12 20:42:49 -05:00 |
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Thomas Harte
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cd90118a0f
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Added two, extraordinarily simple tests.
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2017-02-12 20:32:53 -05:00 |
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Thomas Harte
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a568172758
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Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
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2016-12-28 18:29:37 -05:00 |
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