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Commit Graph

2159 Commits

Author SHA1 Message Date
Thomas Harte
194b7f60c5 Rephrased to allow non-conditional waits; expanded macros to cover all permitted lengths of read and write. 2017-06-18 17:08:50 -04:00
Thomas Harte
ebc7356db5 Reformulated the machine cycle slightly to support posting operation plus phase, thereby exposing the segue points at which waits might be inserted. So: to stick to the rule that CPUs expose the minimum amount of information sufficient completely to reconstruct bus activity. This breaks the Z80 for now. 2017-06-18 12:21:27 -04:00
Thomas Harte
e1a2580b2a Renamed BusOperation to MachineCycle::Operation. 2017-06-17 21:53:45 -04:00
Thomas Harte
b6f51474ff Ensured that -description can handle the newly-captured bus actions. 2017-06-17 18:20:30 -04:00
Thomas Harte
0f18768091 Disabled attempts at bus activity matching within the FUSE tests, at least until I settle on exactly what I intend to do. 2017-06-17 18:19:25 -04:00
Thomas Harte
efc7f9df37 Combined I and R into a register pair. 2017-06-17 18:18:28 -04:00
Thomas Harte
50cd617bd9 Ensured test raises only the intentional failure exceptions. 2017-06-15 22:33:46 -04:00
Thomas Harte
838b818cd3 Finished transcribing first page of machine cycle documentation; several failures contained. 2017-06-15 22:19:49 -04:00
Thomas Harte
cf795562bf Continued filling in tests, fleshing out what the test machine captures as a result. 2017-06-15 20:59:59 -04:00
Thomas Harte
ac37424878 Set up a test class to allow me to discover which of the machine cycle sequences I'm in error on. 2017-06-15 19:06:59 -04:00
Thomas Harte
a336048c98 Merge branch 'ZX80FileFormats' 2017-06-15 18:33:42 -04:00
Thomas Harte
87496f9978 Merge pull request #131 from TomHarte/ZX80FileFormats
Adds very preliminary emulation of the ZX80.
2017-06-15 18:32:38 -04:00
Thomas Harte
08a542a324 Reenabled the fast-loading hack. 2017-06-15 18:30:12 -04:00
Thomas Harte
9b3d05e05f Simplified decoding logic. 2017-06-14 22:24:44 -04:00
Thomas Harte
d8e3103a2b Fixes: switched ZX80 and ZX81 timing to the correct way around, ensured that my wait takes effect if HALT **isn't** set, and made sure to recover from it. 2017-06-13 21:48:17 -04:00
Thomas Harte
76a64d13a0 Made a first attempt at ZX81 emulation. 2017-06-13 21:25:55 -04:00
Thomas Harte
1e975859c2 Started splitting ZX80 and ZX81 paths. Also the '80 fires its horizontal sync a little earlier than the '81, so pulled that back a little. 2017-06-13 20:09:09 -04:00
Thomas Harte
4c5261bfa0 Made first attempt to use the horizontal counter for something; here for sync timing only, even though I've gone exclusively with '81-style timing for now. 2017-06-12 22:28:30 -04:00
Thomas Harte
aed2827e7b Implemented a rudimentary way to test that instructions take as long as the FUSE tests think they should. Hence discovered that the (HL)-accessing BIT, RES and SET weren't. Corrected. 2017-06-12 22:22:00 -04:00
Thomas Harte
e6e6e4e62b Adds an extra character for padding the ZX81 table. 2017-06-12 22:08:11 -04:00
Thomas Harte
8b09b4180b This now at least remembers whether it is meant to be a ZX81 and has storage for a horizontal counter. 2017-06-12 21:33:16 -04:00
Thomas Harte
626737b9fa Started mucking about with some string conversion routines. Not finished yet. 2017-06-12 21:32:36 -04:00
Thomas Harte
22de481557 Made an attempt to get .p/.80 checked and as far as the emulated machine. 2017-06-12 19:41:59 -04:00
Thomas Harte
b9dbb6bcf8 Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate. 2017-06-12 18:55:04 -04:00
Thomas Harte
a48616a138 Fixed reference to Swift-world MachineDocument for the ZX81 file type. 2017-06-12 18:51:11 -04:00
Thomas Harte
8222aac9e3 Added an official declaration of support for ZX81 files. 2017-06-11 21:40:41 -04:00
Thomas Harte
77aa3c187e Rebranded ZX80O as ZX80O81P, with an eye to making it accept ZX81 .p files. Adjusted the initial selection part of the static analyser appropriately. 2017-06-11 21:38:32 -04:00
Thomas Harte
ee0283c985 Modified to use an in-memory buffer for file contents. 2017-06-11 21:35:09 -04:00
Thomas Harte
302c2e94de Corrected lingering hard-coded mask. So titles for memory configurations above 1kb now load. 2017-06-11 21:27:46 -04:00
Thomas Harte
06fe07932a While tidying up, killed an unused instance variable. 2017-06-11 21:21:26 -04:00
Thomas Harte
6913c7a018 This also can just use rom_mask_. 2017-06-11 19:29:20 -04:00
Thomas Harte
6b602c74b7 Made an attempt to support memory maps other than the unexpanded default of 1kb. 2017-06-11 19:29:02 -04:00
Thomas Harte
8116f85479 Allowed the static analyser to specify a ZX80 or 81, and a memory model. Neither is respected yet in the machine. 2017-06-11 19:12:20 -04:00
Thomas Harte
e40d553045 Bumped the tape parser up into the machine to ensure a maintained state. Temporarily disabled normally-timed tape playback. 2017-06-11 18:31:43 -04:00
Thomas Harte
2c6414ce11 Adjusted to allow inspect_waves to swallow a gap before a bit if necessary, increasing the opportunities for its call. 2017-06-11 18:31:09 -04:00
Thomas Harte
e5aea632ee Updated curly bracket placement. 2017-06-11 17:29:22 -04:00
Thomas Harte
e5b30cdfbb Attempted to ensure appropriate resumption of processing after quick-reading a tape byte. 2017-06-11 17:28:47 -04:00
Thomas Harte
ba5f34f827 Narrowed view to the centre 80% of a frame. 2017-06-11 17:24:32 -04:00
Thomas Harte
84d2feb2e6 Cleaned up and implemented fast-tape hack. I've decided it'd be better to test some other software, potentially to give multiple issues to think about, rather than sitting around with just the one. 2017-06-11 16:42:49 -04:00
Thomas Harte
d12e50eb02 Corrected "should I adjust history?" tests. 2017-06-11 16:41:34 -04:00
Thomas Harte
c2bc9a8c62 Ensured no namespace collision in double-include guards. 2017-06-11 16:41:15 -04:00
Thomas Harte
d910a4fd38 Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207.
Also: lots of printfs have grown temporarily as I try to figure out what I'm doing so wrong as to break loading.
2017-06-11 13:32:20 -04:00
Thomas Harte
db30f53ab0 Added the capacity to back-date interrupt line changes within a machine cycle, so that machines which time themselves entirely within perform_machine_cycle can still be cycle accurate on those changes. 2017-06-11 13:31:02 -04:00
Thomas Harte
50be3a24fe Sought to ensure that Mode 1 interrupts aren't happening early. Which they seem not to be. 2017-06-11 13:30:08 -04:00
Thomas Harte
256ba4028b Rejigged to eliminate semi-duplication of the is-a-file test. 2017-06-08 21:52:13 -04:00
Thomas Harte
b07af2660d Adjusted to make sure that the very end of a tape is properly measured. 2017-06-08 21:33:35 -04:00
Thomas Harte
bc0d70b2f7 Added: a shout-out when the tape has been exhausted. 2017-06-08 21:32:27 -04:00
Thomas Harte
c6e48dfd56 Given that a final gap is semantically part of describing tape contents, ensured one formally appears before declaring that the tape has ended. 2017-06-08 21:31:54 -04:00
Thomas Harte
c775db50ef Ensured no out-of-bounds accesses. 2017-06-08 21:31:03 -04:00
Thomas Harte
ee4c8b5ad2 Ensured final byte plays out. 2017-06-08 19:51:49 -04:00