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Commit Graph

12 Commits

Author SHA1 Message Date
Thomas Harte
26ab96868a Decided to turn the 6522 into a template, since it's a per-cycle thing with variable behaviour. Added appropriate memory map callouts to hit the two in the Vic. Though they don't yet do anything. 2016-06-07 19:15:18 -04:00
Thomas Harte
c7c55528e2 Realised that registers appear also to be readable. 2016-06-06 20:29:39 -04:00
Thomas Harte
64539a2b24 Advanced to having some characters displayed, even though they're obviously very much incorrect and the display is still rolling. 2016-06-06 07:35:35 -04:00
Thomas Harte
9e9e50edb1 Added guess on how colour memory and the 12-bit bus possibly works. 2016-06-05 16:28:06 -04:00
Thomas Harte
2ab21e7a3c Switched to a real (unexpanded) memory map, meaning that nonsense is no longer being supplied to the VIC. 2016-06-05 16:00:35 -04:00
Thomas Harte
9566c87532 Added enough to the machine that the 6560 can now produce output if it wishes. 2016-06-05 12:11:12 -04:00
Thomas Harte
b56482607e Added just enough that the 6502 should now be operating correctly. 2016-06-05 11:44:29 -04:00
Thomas Harte
0b221e773f Fixed ROM naming and sizes, ensured machines without sound outputs don't end up with an audio queue. 2016-06-05 11:20:05 -04:00
Thomas Harte
f922d38ed2 The Vic now captures the ROMs sent to it and has just enough infrastructure to get to a black screen. Progress! 2016-06-05 10:51:07 -04:00
Thomas Harte
12243c40ad Kicking the ball a little further down the road, ROMs and PRGs now reach the actual emulated machine. 2016-06-05 09:06:59 -04:00
Thomas Harte
b10a06e700 A CRT is still absent but this moves the ball back into the C++ side's court. 2016-06-04 22:00:50 -04:00
Thomas Harte
404873fe58 Started sketching out infrastructure for Vic-20 support. 2016-06-04 21:43:50 -04:00