Thomas Harte
270f46e147
Normalises CMPl.
2019-04-29 17:27:56 -04:00
Thomas Harte
c0e9c37cc7
Improves memory map model, as far as it goes.
2019-04-29 17:27:44 -04:00
Thomas Harte
8564945713
Corrects vector nomination for unrecognised opcodes.
2019-04-29 17:10:33 -04:00
Thomas Harte
7bd7f3fb73
Sign-extends (xxx).w addresses.
2019-04-29 16:55:43 -04:00
Thomas Harte
5b5bfc8445
Applies trace testing to EmuTOS.
2019-04-29 16:55:21 -04:00
Thomas Harte
c466b6f9e7
Factors out the [unit testing] stuff of being a trace-checking 68000 bus handler.
2019-04-29 16:11:01 -04:00
Thomas Harte
407643c575
Tweaks test length slightly to ensure this doesn't run beyond the final line's end.
2019-04-29 15:40:17 -04:00
Thomas Harte
d9071ee9f1
Starts sketching out the asynchronous bus.
2019-04-29 13:45:53 -04:00
Thomas Harte
97e118abfa
Corrects accidental exclusion of MOVE.bw (xxx).w, [(xxx).w/(xxx).l].
2019-04-28 23:25:46 -04:00
Thomas Harte
412f091d76
Implements a missing form of BTST.
2019-04-28 23:20:50 -04:00
Thomas Harte
d9278e9827
Attempts to complete the list of things I can't disassemble.
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Mysteries to be solved here, definitely. But: 13 missing opcodes remaining.
2019-04-28 23:11:49 -04:00
Thomas Harte
ca1f669e64
Implements MOVEP.
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371 is now the alleged number of missing opcodes. But I'd dare imagine it's more like three or four.
2019-04-28 22:52:54 -04:00
Thomas Harte
0298b1b3b7
Implements LINK and UNLINK.
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Also starts excluding opcodes that I can't determine the mapping of from the list of those tested against.
Due to those two things together, the latter incomplete: 627 opcodes outstanding. But only STOP and MOVEP remain on my list of things to implement prior to exceptions.
2019-04-28 17:12:31 -04:00
Thomas Harte
4b1324de77
Takes a run at TRAPV.
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... to leave 1466 as the unimplemented count.
2019-04-28 15:52:58 -04:00
Thomas Harte
8e8dce9bec
Attempts an implementation of CHK.
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1467 is now the official count of things to implement, though I'm starting to get suspicious.
2019-04-28 15:47:21 -04:00
Thomas Harte
f4350522bf
Implements NBCD.
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Now outstanding: 1891.
2019-04-27 21:29:50 -04:00
Thomas Harte
e2abb66a11
Adds missing addressing modes for ADDA and SUBA.
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... reducing missing opcodes to 1941.
2019-04-27 17:22:26 -04:00
Thomas Harte
ab5fcab9bf
Attempts an implementation of ADDX and SUBX.
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Leaving 2005 non-[A/F]-line instructions.
2019-04-27 16:57:47 -04:00
Thomas Harte
cf547ef569
Improves semantic communications and temporarily omits A- and F-line instructions.
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So it looks like 2773 instructions left to go.
2019-04-27 15:15:03 -04:00
Thomas Harte
e75b386f7d
Attempts DIVU and DIVS.
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Reportedly leaving 10965 operations now unimplemented.
2019-04-26 22:22:35 -04:00
Thomas Harte
796203859f
Implements PEA.
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This decreases the unimplemented count by 28 from 11841 to 11813.
2019-04-26 13:49:59 -04:00
Thomas Harte
40f68b70c1
Adds quantification of reports.
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Depressingly; 11,841 opcodes are still missing. Better get on with it!
2019-04-26 13:25:34 -04:00
Thomas Harte
40b2fe7339
Merge branch 'master' into 68000
2019-04-26 00:02:35 -04:00
Thomas Harte
a3b6d2d16e
Corrects test and resolves all instances of opcodes that are valid but shouldn't be.
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The converse case will require implementation of the remaining instructions.
2019-04-25 22:54:58 -04:00
Thomas Harte
3983f8303f
Introduces failing test of 68000 opcode coverage.
2019-04-25 22:06:05 -04:00
Thomas Harte
7cbd5e0ef6
Imports additional files used as test cases.
2019-04-25 21:43:47 -04:00
Thomas Harte
dab9bb6575
Implements EXT.
2019-04-25 18:22:19 -04:00
Thomas Harte
7df85ea695
Cleans up and formally introduces a comparative source for QL startup.
2019-04-25 15:42:41 -04:00
Thomas Harte
c132bda01c
Implements MOVE from SR.
2019-04-25 14:39:32 -04:00
Thomas Harte
4e25bcfcdc
Corrects decoding of AND/OR x, Dn.
2019-04-25 14:19:13 -04:00
Thomas Harte
ea463549c7
Corrects overflow flag for LSL and LSR.
2019-04-25 13:59:10 -04:00
Thomas Harte
723acb31b3
Corrects various flag issues with ADD, SUB and NEG.
2019-04-25 13:53:23 -04:00
Thomas Harte
5725db9234
Corrects calculated-address TAS.
2019-04-25 12:42:05 -04:00
Thomas Harte
8557e563bc
Takes a run at TAS, clarifying bus cycles.
2019-04-25 12:19:40 -04:00
Thomas Harte
d2491633ce
Ensures MOVEM to M .w correctly updates A7.
2019-04-24 23:21:15 -04:00
Thomas Harte
002796e5f5
Takes a run at BSET and BCHG.
2019-04-24 23:01:32 -04:00
Thomas Harte
fa0accf251
Attempts to correct flags for ASL, ASR, LSL, LSR.
2019-04-24 21:04:47 -04:00
Thomas Harte
dcb8176d90
Corrects potential failure properly to set stack pointer state.
2019-04-24 17:58:27 -04:00
Thomas Harte
be32b1a198
Fixes JSR (An) return address [again].
2019-04-24 17:50:38 -04:00
Thomas Harte
582e4acc11
Implements ANDI/ORI/EOR to SR/CCR.
2019-04-24 17:38:59 -04:00
Thomas Harte
10f75acf71
Causes EXG to function.
2019-04-24 16:32:16 -04:00
Thomas Harte
b9933f512f
Fixed: the word/long-word bit works the other way around.
2019-04-24 16:30:15 -04:00
Thomas Harte
75a7f7ab22
Inserts missing program fetch for CMPI.bw #, (d8/16...).
2019-04-24 14:45:24 -04:00
Thomas Harte
757be2906e
Merge pull request #620 from rzumer/fix_typos
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Correct typos in Z80.hpp
2019-04-24 13:25:06 -04:00
Thomas Harte
e214584c76
SWAP should clear overflow and carry.
2019-04-24 13:19:56 -04:00
Thomas Harte
0bb6b498ce
Simplifies and fixes post-inc MOVE behaviour.
2019-04-24 13:14:25 -04:00
Thomas Harte
958d44a20d
Causes SWAP actually to perform.
2019-04-24 13:06:12 -04:00
Thomas Harte
bb9424d944
Corrects byte increment/decrement actions for A7.
2019-04-24 13:01:08 -04:00
Thomas Harte
11bf706aa2
Attempts to fix LT and LTE conditions.
2019-04-24 10:07:17 -04:00
Thomas Harte
033b8e6b36
ADD/SUBQ #, An shouldn't set flags.
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Also, temporarily at least, adds a new means for observing CPU behaviour.
2019-04-24 09:59:54 -04:00
