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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-18 01:07:58 +00:00
Commit Graph

1694 Commits

Author SHA1 Message Date
Thomas Harte
274867579b Deploys constexpr as a stricter const. 2019-12-22 00:22:17 -05:00
Thomas Harte
05d77d3297 Also deploys make_unique/shared to avoid type repetition. 2019-12-21 23:52:04 -05:00
Thomas Harte
e5440a4146 Hacks in a colour burst.
With a major flaw: it's implicit. I think I need a minor rethink of various components here.
2019-12-20 23:49:38 -05:00
Thomas Harte
47508d50a7 Wires through a composite video option for the ST.
Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.
2019-12-20 20:49:14 -05:00
Thomas Harte
3d83f5ab49 Ensures a proper size handoff and implements a ripple feature I happened to find a forum post about. 2019-12-19 22:58:07 -05:00
Thomas Harte
0007dc23b3 Eliminates bit 0 of the DMA address. 2019-12-19 22:44:21 -05:00
Thomas Harte
ed7f171736 Moves address reload to end of vertical sync.
I have no information as to when it should be, so this is as valid a guess as any other.
2019-12-19 22:20:43 -05:00
Thomas Harte
0e066f0f70 Removes 'done' TODO.
For certain values of done.
2019-12-19 22:19:59 -05:00
Thomas Harte
d85ae21b2f Adds an explicit declaration of chip type to all AY users. 2019-12-18 19:28:41 -05:00
Thomas Harte
c00ae7ce6a Adds a one-cycle delay on frequency changes. 2019-12-13 19:57:54 -05:00
Thomas Harte
4bcf217324 Ensures delayed loading isn't interrupted by blank, hsync. 2019-12-12 23:20:28 -05:00
Thomas Harte
f6f2b4b90f Removes double DE edge test. 2019-12-12 22:50:35 -05:00
Thomas Harte
95b5db4d87 Tweaks timings yet further, adds a FIFO reset.
The accuracy of this may require further research.
2019-12-11 23:22:20 -05:00
Thomas Harte
de4403e021 Corrects blank timing. 2019-12-10 22:17:57 -05:00
Thomas Harte
0a405d1c06 Introduces a latency between DE and load. 2019-12-10 21:24:15 -05:00
Thomas Harte
768b3709b8 Corrects audio clock rate. 2019-12-10 20:25:27 -05:00
Thomas Harte
a7cfb840ef Adds but presently disables a diagnostic for border elimination. 2019-12-08 22:34:42 -05:00
Thomas Harte
c785797da6 Adds a warning for unhandled reset. 2019-12-08 21:01:30 -05:00
Thomas Harte
0408592ada Switches to byte buffers and seeks to reduce unnecessary video flushing. 2019-12-08 20:20:13 -05:00
Thomas Harte
0ed87c61bd Introduces an explicit area of floating bus, starts adding bus errors. 2019-12-08 11:52:43 -05:00
Thomas Harte
08a27bdec7 NTSC frame length is correct; removes TODO. 2019-12-08 11:51:12 -05:00
Thomas Harte
894066984c Moves beginning and end of vertical sync to what I now believe is its proper place.
At least one demo now successfully opens the top border.
2019-11-19 20:13:47 -05:00
Thomas Harte
e787c03530 Slightly shortens NTSC frame.
Either: (i) 263 is incorrect; or (ii) my logic as to frame height is incorrect. Given that the horizontal side of things is really well documented, I'm currently guessing (i). Research to do.
2019-11-18 23:47:27 -05:00
Thomas Harte
c04d2f6c6e Restricts DTack delay to RAM and Shifter accesses. 2019-11-18 22:57:13 -05:00
Thomas Harte
6990abc0d3 Tweaks selected output mode when both BPP bits are set. 2019-11-18 22:56:40 -05:00
Thomas Harte
ade8df7217 Permits a delay on DE propagation back to the CPU. Plus tests.
Currently set at 28 cycles, but I don't know.
2019-11-18 22:12:24 -05:00
Thomas Harte
82c984afa4 Switches the joysticks around.
Thereby finally allowing me to control mode games.
2019-11-18 20:02:27 -05:00
Thomas Harte
1202b0a65f Establishes a pipeline for delayed public state visibility. 2019-11-17 23:28:00 -05:00
Thomas Harte
facc0a1976 Amps up the documentation. 2019-11-17 21:28:51 -05:00
Thomas Harte
253dd84109 Corrects accidental dropping of pixel residue.
Specific issue: the repeated (start_column != end_column) test, which can no longer be correct if start_column has been incremented in the (x_&7) test.

The visible effect was to omit pixels from the output wave, which also affected observed sync timing.
2019-11-17 18:34:13 -05:00
Thomas Harte
2c4f372872 Adds support for the .ST file format. 2019-11-12 23:23:14 -05:00
Thomas Harte
f4cfca0451 Merge branch 'master' of github.com:TomHarte/CLK 2019-11-12 19:38:44 -05:00
Thomas Harte
eb287605f7 Switches to a default of TOS 1.04. 2019-11-12 19:38:30 -05:00
Thomas Harte
6a82c87320 Withdraws border optimisation temporarily; I think I may be onto an output bug here. 2019-11-12 19:33:13 -05:00
Thomas Harte
f0478225f0 Adjusts logic to reduce number of output spans. 2019-11-12 19:30:28 -05:00
Thomas Harte
c6f6bc68e1 Undoes non-insertion of media. 2019-11-10 21:52:06 -05:00
Thomas Harte
ab34fad8ca Introduces a cleaner, separated shifter. 2019-11-10 21:39:40 -05:00
Thomas Harte
7ae0902103 Adds additional joystick commands to the dispatcher. 2019-11-09 20:10:54 -05:00
Thomas Harte
8e9428623e Adds joystick events to the Atari ST. 2019-11-09 18:39:22 -05:00
Thomas Harte
2c25135d8a Fixes const correctness for joystick machines; the ST is now one such. 2019-11-09 18:19:05 -05:00
Thomas Harte
860837d894 Corrects: KeyPad -> Keypad. Also fleshes out Atari ST keyboard mapping. 2019-11-09 18:02:14 -05:00
Thomas Harte
0204003680 Resolves GCC warnings. 2019-11-09 16:12:37 -05:00
Thomas Harte
77ef7dc8fc Shuffles ST and 2600 into a common parent. 2019-11-09 15:31:41 -05:00
Thomas Harte
e3abbc9966 Renames what didn't end up being a whole SerialPort. 2019-11-09 15:21:51 -05:00
Thomas Harte
70c6010fe0 Expands visible area and adds a few more safety barriers. 2019-11-09 15:00:42 -05:00
Thomas Harte
45375fb5d0 Makes endian aware. 2019-11-09 09:48:59 -05:00
Thomas Harte
d2324e413d Clarifies ownership of bpp-has-changed test. 2019-11-09 00:10:59 -05:00
Thomas Harte
e0c15f43bb Avoids massive over-flushing of pixel buffers. 2019-11-09 00:05:02 -05:00
Thomas Harte
8b0d550b81 Attempts to move vertical sync out to cycle 30. 2019-11-08 22:18:47 -05:00
Thomas Harte
d1259f829e Moves vertical state decisions back to cycle 502. 2019-11-08 21:42:05 -05:00