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Commit Graph

78 Commits

Author SHA1 Message Date
Thomas Harte
80cf3d9301 Formally gave the 2600 responsibility for providing the code that decodes one of the things it has put into a buffer into a composite sample. 2015-09-03 12:28:16 -04:00
Thomas Harte
ac8fc9a1a0 Experimenting with pre-encoding luminance and chrominance separation over on the
CPU as otherwise the GPU does them repetitively and more awkwardly (as it's working purely in floats). It means uploading twice as much data though, so I don't
 know. Still only half as much as the RGBA path of a few days ago. Will experiment.

Also slightly adjusted division of responsibility in the fragment shader per the
 desire to have the `sample` function owned externally.
2015-09-03 11:15:23 -04:00
Thomas Harte
cb6e6e8acb It's the worst fragment shader you'll ever see. The worst. But this attempts NTSC composite video emulation, artefacts included. 2015-09-01 22:36:45 -04:00
Thomas Harte
043d2f9896 It sounds like the two sync signals are exclusive ORd. 2015-08-19 21:36:33 -04:00
Thomas Harte
c5e480cfae Threw in missile repeats. 2015-08-19 09:46:57 -04:00
Thomas Harte
ca6b54536e Added fire and reset inputs. 2015-08-18 20:58:05 -04:00
Thomas Harte
bc805a90fe Wired up joystick directions, at least, and fire button presses get as far as the C++. But there's some latching to figure out before they'll work. 2015-08-18 20:33:24 -04:00
Thomas Harte
d21ccddeef Fixed: _vBlankExtend is now cleared at the correct moment. 2015-08-17 17:54:36 -04:00
Thomas Harte
a33d31d02a Fixed to allow loading of ROMs less than 1kb in size. 2015-08-17 00:34:01 -04:00
Thomas Harte
df68aeff5a Fixed: made sure that _vBlankExtend resets itself even on non-pixel lines. 2015-08-17 00:09:28 -04:00
Thomas Harte
414849f166 Confirmed: pixel counters are not paused by programmatic vertical blank. 2015-08-16 17:34:20 -04:00
Thomas Harte
a693c081f8 Switched on the appropriate compiler warnings re: signed comparisons and implicit conversions. Fixed all less-than-explicit calls. 2015-08-16 16:08:29 -04:00
Thomas Harte
410c09cb35 Made attempt not to touch the _collisions registers (which are instance variables) unless the local variables imply it's potentially necessary. So that's a broad phase on collisions, I guess. 2015-08-16 15:39:40 -04:00
Thomas Harte
40cb1cf60d ... and the ball graphic. 2015-08-16 11:24:33 -04:00
Thomas Harte
afaa86a649 Minor thing: skip the internal counter stuff if we're definitely going to end up with a transparent pixel anyway for the player and missile graphics. 2015-08-16 11:23:46 -04:00
Thomas Harte
4b5aabdd54 Attempted to take even more out of the inner pixel loop. 2015-08-13 23:23:04 +01:00
Thomas Harte
92c7d56cc3 Tiny little speed improvement. Every little helps. 2015-08-13 21:50:24 +01:00
Thomas Harte
17bbe27c9a As an experiment, performed some very basic moving of playfield composition outside of the pixel loop. 2015-08-13 21:32:22 +01:00
Thomas Harte
033655835a My understanding now is that object position counting will begin the cycle after the call is made, not that cycle, and that the timer loops just once, with the logic for counter pumping being whether the relevant flag is still set, irregardless of whether the counter is still going. 2015-08-13 18:59:23 +01:00
Thomas Harte
323aa27e13 Fixed: paging is based directly on the access, independent of the read/write line (since it isn't actually exposed to catridges). 2015-08-13 15:04:30 +01:00
Thomas Harte
9838e01cc1 Made a first attempt at paging. 2015-08-13 13:24:02 +01:00
Thomas Harte
9ca57b80a7 Minor steps to help with diagnostics; all commented out or merely to benefit with breakpoint placement. 2015-08-13 08:43:10 +01:00
Thomas Harte
6616265d93 Fixed collision tests, added a few more timing tests. 2015-08-13 03:33:45 +01:00
Thomas Harte
d19f8ed507 Removed the implicit reset upon 6502 startup, adding a reset line. Hence all tests now pass again. Added an empty shell for timing tests, the all-RAM 6502 now counting bus cycles. 2015-08-13 00:51:06 +01:00
Thomas Harte
687816d470 Made some attempted simplifications, implemented collisions. 2015-08-13 00:31:57 +01:00
Thomas Harte
aebf636528 Ensured the PIA timer resumes its normal tick rate after being read; fixed those spaces that had crept in where tabs should be. 2015-08-10 16:55:16 +01:00
Thomas Harte
42677f5f83 Fixed association of motion registers and actual registers. 2015-08-10 16:43:45 +01:00
Thomas Harte
2dde2efff0 Attempted to standardise object counters. 2015-08-10 15:09:40 +01:00
Thomas Harte
a228969655 This should happen every fourth cycle. 2015-08-10 08:16:17 +01:00
Thomas Harte
3c27306a8e My counter was going the wrong way. 2015-08-10 00:33:37 +01:00
Thomas Harte
a4e52cc4db Made an attempt to switch to a hardware-accurate object timer model. Without yet perfect success. 2015-08-10 00:20:18 +01:00
Thomas Harte
cd67e31e64 Made a first attempt at switching a little closer to TIA's real internal counter setup. 2015-08-09 22:47:11 +01:00
Thomas Harte
987be65a59 Made a quick attempt at reimplementing skip-to-the-end logic for ready waits. 2015-08-09 02:42:01 -04:00
Thomas Harte
eb23a493e5 Switched back to one texel per colour clock, at least for now. Attempted to break _RGBA assumption within the cathode ray view. 2015-08-05 23:36:04 -04:00
Thomas Harte
fd36f13baf The cathode ray view no longer hard codes the frame size. So that's one less coupling. Doubled pixel output size to give sufficient sampling detail to capture the NTSC colour clock (ummm, hopefully). 2015-08-05 21:45:47 -04:00
Thomas Harte
5644b3a1cc Fixed scanline sizing and fill issues, as well as shortening vsync to the correct Atari length. 2015-08-05 20:55:27 -04:00
Thomas Harte
5313b48ebd I'm ashamed to admit, I: played with numbers until enough things looked stable such that I can investigate other things. Discovery: my PAL autodetection was way off. Fixed, hopefully. 2015-08-02 20:32:18 -04:00
Thomas Harte
5f1d76e855 Can't seem to find any documentation: assumed horizontal sync is generated during vertical. 2015-07-31 18:49:02 -04:00
Thomas Harte
9c91f1a2eb Added an attempt at NTSC/PAL autodetection, based on number of missed vertical syncs. 2015-07-31 18:04:33 -04:00
Thomas Harte
a5d66e9dd6 Factored out a few more constants, started trying to ensure there's enough slack and the mechanisms in place for the CathodeRayView to hold onto two frames if it desires, for potential phosphor simulation, switched once again to additive blending — much more like a real CRT — and added a sine function across the width of spans per my understanding of how an electron gun actually fires.
Why do all this when overall timing is still so far off? It helps me more easily see how overall timing is so far off.
2015-07-31 17:47:10 -04:00
Thomas Harte
c1d1fb65cb Made an attempt properly to emulate the RDY line and the Atari's use of it. 2015-07-31 16:54:20 -04:00
Thomas Harte
53dd5c8f16 Trying to fix my RDY line emulation. Switched to PAL timings, at least temporarily, since it's starting to make a difference. 2015-07-31 16:44:53 -04:00
Thomas Harte
39bfbf1000 Attempted ball graphics enable delay. 2015-07-30 23:01:28 -04:00
Thomas Harte
78e66d2577 Added an attempt at ball rendering. 2015-07-30 21:30:00 -04:00
Thomas Harte
a95b36a53d Made first attempt at missile display. In Enduro, at least, one seems to work but the other seems to be absent. 2015-07-30 21:09:18 -04:00
Thomas Harte
1b7846f09b Made a first attempt at the sprite latches. Hopefully this should make a few more Activision logos, etc, show up correctly. 2015-07-30 20:52:26 -04:00
Thomas Harte
1fa7a77793 Continuing in my attempts to figure out the complete absence of graphics from some games: there are 262 lines on an NTSC screen, not 256. Also ensured that the CRT has a little spare range at the edges so that its generated triangles don't wrap around just because of integer overflow. 2015-07-30 20:07:20 -04:00
Thomas Harte
98efae2536 Reintroduced emergency vertical sync — so that output occurs even when the emulation isn't catching syncs properly — and switched some spaces to tabs. 2015-07-30 17:16:49 -04:00
Thomas Harte
14adcd2096 Had a quick bash at timer overflow. 2015-07-30 16:09:32 -04:00
Thomas Harte
58908b60ac So, provisionally: this looks like (i) the one cycle to write; plus (ii) the number of cycles to get to the end of the pixels (which is _horizontalTimer+1 for me because _horizontalTimer = 0 is a pixel); plus (iii) one cycle of latency to wake up. Am I making that up? Time will tell. 2015-07-30 15:49:38 -04:00