Thomas Harte
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3ceb378b9b
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Relocate disk logic into a separate compilation unit.
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2021-11-02 17:35:23 -07:00 |
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Thomas Harte
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1cf1c90511
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Adds support for interlaced output.
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2021-11-02 14:34:03 -07:00 |
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Thomas Harte
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d989825216
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Add bonus notes on VPOSR.
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2021-11-02 03:47:39 -07:00 |
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Thomas Harte
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3976420b88
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Retains a little more of output controls.
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2021-11-01 17:15:36 -07:00 |
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Thomas Harte
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2f1ce5fe43
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Switch to using the swizzled palette for playfield output.
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2021-11-01 14:44:30 -07:00 |
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Thomas Harte
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42145a5b8a
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Delay bitplane installation until end of slot.
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2021-11-01 14:18:58 -07:00 |
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Thomas Harte
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4e66017205
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Enable sprite reuse and toggle to inactive when visible region is over.
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2021-10-31 16:52:48 -07:00 |
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Thomas Harte
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4c1ab6ff25
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Rethinks bitplane stops.
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2021-10-31 09:01:38 -07:00 |
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Thomas Harte
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02c88e6826
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VHPOSR's fields are the other way around.
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2021-10-30 12:04:46 -07:00 |
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Thomas Harte
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d25804f4a2
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Throws in official register names.
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2021-10-29 14:05:11 -07:00 |
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Thomas Harte
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edb75e69cb
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Implement bitplane modulos.
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2021-10-29 11:29:22 -07:00 |
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Thomas Harte
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b952d73e83
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Disallow programmatic setting of blitter status.
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2021-10-29 06:19:57 -07:00 |
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Thomas Harte
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da1a69be27
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Caps mouse speed.
Also takes another guess at CIA interrupt bits. To no avail.
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2021-10-27 18:38:02 -07:00 |
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Thomas Harte
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139d35c6f9
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Switches to basic use of sprite shifters.
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2021-10-25 20:58:48 -07:00 |
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Thomas Harte
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cb24457b4a
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Starts on a two-at-a-time sprite shifter.
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2021-10-25 16:30:30 -07:00 |
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Thomas Harte
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9f3efb7f05
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Limits graphical output to [all but one bit] of the display window.
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2021-10-25 14:12:23 -07:00 |
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Thomas Harte
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e6001e0f22
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Shifts bitplanes irrespective of output window.
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2021-10-25 13:59:39 -07:00 |
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Thomas Harte
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c6535bf035
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Switches bitplane shifter to returning four high-res pixels at a time.
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2021-10-25 13:34:36 -07:00 |
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Thomas Harte
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7118a515e0
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Reduce logging in trustworthy areas.
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2021-10-23 20:36:41 -07:00 |
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Thomas Harte
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952451c9b8
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Add mouse input.
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2021-10-23 20:17:13 -07:00 |
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Thomas Harte
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610327a04e
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Fix sprite H start bit order.
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2021-10-22 23:20:20 -07:00 |
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Thomas Harte
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2121e32409
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Fix sprite bit ordering.
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2021-10-22 21:10:01 -07:00 |
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Thomas Harte
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7ec21edc2f
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Attempts to hack in some form of sprite display.
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2021-10-22 19:51:10 -07:00 |
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Thomas Harte
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003162f710
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Limit to specific purpose.
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2021-10-22 16:16:19 -07:00 |
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Thomas Harte
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040ac93042
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Takes a shot at the vertical stuff of sprite DMA.
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2021-10-22 14:32:59 -07:00 |
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Thomas Harte
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b489ba3d0d
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Adds sprite DMA windows.
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2021-10-22 13:07:20 -07:00 |
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Thomas Harte
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c5e8b547af
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Captures the attach flag and observes activation rule.
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2021-10-22 11:21:58 -07:00 |
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Thomas Harte
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e67de90ad0
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Starts to bring sprites inside DMADevice orthodoxy.
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2021-10-21 21:57:46 -07:00 |
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Thomas Harte
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c3c84c88a1
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Switch to ahead-of-time planar to chunky conversion.
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2021-10-21 20:48:57 -07:00 |
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Thomas Harte
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0dc9c4cee1
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Undo hard-coding of fetch window.
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2021-10-19 15:18:39 -07:00 |
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Thomas Harte
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b312a61a81
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Add two dummy reads.
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2021-10-16 13:30:45 -07:00 |
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Thomas Harte
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e27a10bde4
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Simplify control flow.
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2021-10-14 16:47:18 -07:00 |
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Thomas Harte
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253a199f27
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Fire sync-match interrupt upon any match.
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2021-10-14 16:36:17 -07:00 |
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Thomas Harte
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b12c640807
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Makes drives non-copyable.
To avoid error in the future.
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2021-10-14 12:37:55 -07:00 |
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Thomas Harte
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9be23ecc34
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Add end-of-Blit interrupt.
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
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2021-10-13 15:09:19 -07:00 |
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Thomas Harte
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eec068914e
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Slightly improve logging.
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2021-10-11 18:05:57 -07:00 |
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Thomas Harte
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39b8285ba5
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Trust the HRM on step bit, but catch rising edge.
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2021-10-11 07:42:42 -07:00 |
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Thomas Harte
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7733fef3bd
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DSKLEN has to be written twice.
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2021-10-11 06:16:01 -07:00 |
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Thomas Harte
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6acddfdb98
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Add the sync match interrupt.
Albeit that it doesn't yet unblock disk DMA.
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2021-10-11 03:37:56 -07:00 |
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Thomas Harte
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99492c2ec2
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Further tweak logging.
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2021-10-10 18:19:50 -07:00 |
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Thomas Harte
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846b505d27
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Reduce logging; disk data probably isn't the immediate obstacle.
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2021-10-10 13:04:10 -07:00 |
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Thomas Harte
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8d43b4a98d
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Expands Disk DMA access window.
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2021-10-10 11:47:02 -07:00 |
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Thomas Harte
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9336ffe216
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Take a stab at index-hole sync.
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2021-10-09 08:01:02 -07:00 |
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Thomas Harte
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eb157f15f3
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Adds index hole interrupt.
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2021-10-09 04:08:59 -07:00 |
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Thomas Harte
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d6e2a3f425
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Make a first attempt to spool into RAM.
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2021-10-08 18:11:47 -07:00 |
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Thomas Harte
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b47ca13ed3
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Push disk data onwards.
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2021-10-08 17:18:11 -07:00 |
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Thomas Harte
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67546c4d6e
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Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt.
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2021-10-08 17:12:37 -07:00 |
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Thomas Harte
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f72deb0a5c
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Correct RDY position.
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2021-10-08 04:32:13 -07:00 |
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Thomas Harte
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616ccbb878
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Correct ID bit placement, multiplex with motor state.
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
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2021-10-08 04:05:57 -07:00 |
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Thomas Harte
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5899af0038
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Starts accumulating disk data.
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2021-10-07 05:11:32 -07:00 |
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