Thomas Harte
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3947347d88
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Introduces active input handling for the AY and uses it in the CPC to give proper, active keyboard input, rather than push-on-select, which was only ever a temporary hack. Also maps a few more keys for the Amstrad.
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2017-08-15 22:47:17 -04:00 |
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Thomas Harte
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334872d374
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Clarified, slightly.
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2017-08-14 12:47:11 -04:00 |
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Thomas Harte
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7ea703f150
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Started making provisions for a DMA-compatible implementation. Re: the CPC, it sounds like DMA acknowledge might be permanently wired, causing DMA mode seemingly to work from the 8272's point of view.
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2017-08-14 08:38:00 -04:00 |
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Thomas Harte
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1d8edf58dd
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Ensured that a virtual destructor is declared, so that the various automatically-generated real constructors get in on the action.
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2017-08-11 12:07:48 -04:00 |
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Thomas Harte
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4785e316ff
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Now with exposition.
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2017-08-11 11:36:03 -04:00 |
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Thomas Harte
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44da9de5b0
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Tweaked typing timing expectations.
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2017-08-11 11:35:28 -04:00 |
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Thomas Harte
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570d25214e
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Made an initial attempt at typer support for the CPC.
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2017-08-11 11:21:07 -04:00 |
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Thomas Harte
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cf810d8357
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Minor: ensure the CRT is set to output as a monitor.
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2017-08-10 14:42:47 -04:00 |
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Thomas Harte
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4961fda2a9
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Ensured counter-intuitive CRTC writes get through, taking the opportunity to correct my handling of port IO in general: selecting multiple devices for input results in a logical AND (i.e. open collector mode), and both the CRTC and gate array will receive data from 'input's if applicable.
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2017-08-10 12:39:19 -04:00 |
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Thomas Harte
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6a6e5ae79c
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Forced users of the 6845 to be explicit about which type. So far with no effect.
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2017-08-10 12:28:57 -04:00 |
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Thomas Harte
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484524d781
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Implements RAM paging. The 6128 is now emulated.
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2017-08-08 16:01:56 -04:00 |
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Thomas Harte
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a7103f9333
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Disks are now communicated to the 8272. Which is able to handle four of them.
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2017-08-06 13:24:14 -04:00 |
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Thomas Harte
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29288b690e
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Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller.
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2017-08-06 09:45:16 -04:00 |
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Thomas Harte
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3e984e75b6
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Strung up an empty shell that eventually should contain the 8272, and added appropriate IO decoding to the Amstrad.
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2017-08-05 19:45:52 -04:00 |
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Thomas Harte
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9e8645ca7a
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Fixed ROM paging port decoding. It should have been fd00 if completely decoded, not df00, but also shouldn't be completely decoded.
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2017-08-05 19:24:03 -04:00 |
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Thomas Harte
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caf3ac0645
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Sought: (i) to instruct the CPC that it should be a 664, not a 464, if given a disk image (at least until I have RAM paging implemented for a 6128); (ii) to support ROM selection within the CPC and allow paging in of AMSDOS.
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2017-08-05 19:20:38 -04:00 |
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Thomas Harte
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4b19cf60df
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Added omitted semicolon.
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2017-08-05 09:18:55 -04:00 |
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Thomas Harte
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b3788fed41
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Fixed AY queuing behaviour as handled by the Amstrad. I think I need to come up with clearer semantics here.
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2017-08-05 09:12:17 -04:00 |
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Thomas Harte
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a63aa80dc9
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Merge branch 'master' of github.com:TomHarte/CLK
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2017-08-04 16:51:52 -04:00 |
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Thomas Harte
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63f57c8c4f
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Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor.
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2017-08-04 16:51:46 -04:00 |
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Thomas Harte
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f075fea78c
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Introduces filtering of the CRTC's vsync signal into the gate array.
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2017-08-04 16:36:55 -04:00 |
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Thomas Harte
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c0f0c68f4f
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Corrects quick-hack version of border drawing: the assumption that the colour must be the same over a plotted period. Also corrects my entry for colour 15.
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2017-08-04 12:13:05 -04:00 |
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Thomas Harte
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d9097facf1
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Found documentation that makes more sense, and in practice seems to be more correct: the test after vertical sync is for greater than 32, not less. Also I decided to chance my arm on counter reset also resetting interrupt request. The raster effects of Ghouls 'n' Ghosts is now pretty much correct but one line off. I think probably either something is off in my wait-two logic on the post-vsync timer event, or possibly the vsync bit exposed via the PPI doesn't mean exactly what I think it means.
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2017-08-04 08:56:09 -04:00 |
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Thomas Harte
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b927500487
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Clarified code a little, but this is mostly fiddling in the margins.
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2017-08-03 22:00:30 -04:00 |
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Thomas Harte
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e71eabedf9
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Fixed timer clearing tet.
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2017-08-03 21:30:04 -04:00 |
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Thomas Harte
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33ed27c3ad
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Minor tidiness: included missing headers, and spaced out the ROM type and key lists for readability.
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2017-08-03 12:45:42 -04:00 |
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Thomas Harte
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575b1dba75
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Formally declared the ZX80/81 and Amstrad CPC as keyboard machines in their public interface. Which means not having to repeat the meaning of set_key_state and clear_all_keys. So: a minor DRY improvement.
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2017-08-03 12:38:22 -04:00 |
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Thomas Harte
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42e70ef993
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Adjusted slightly as per Z80 change, and to pull everything internally declared into the Amstrad CPC namespace.
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2017-08-02 22:11:03 -04:00 |
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Thomas Harte
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d3bf8fa53b
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Upped the documentation.
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2017-08-02 20:37:26 -04:00 |
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Thomas Harte
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f5e2dd410e
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Constrained output to the centre 90%.
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2017-08-02 19:55:44 -04:00 |
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Thomas Harte
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e50adf1cc8
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Were my TZX support up to it, this would likely be sufficient for tape emulation.
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2017-08-02 13:50:14 -04:00 |
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Thomas Harte
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dcab10f53e
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Ensured the AY's async queue doesn't just fill and fill.
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2017-08-02 07:38:35 -04:00 |
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Thomas Harte
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f602f9b6ec
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Adds an attempt to clock the AY.
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2017-08-02 07:21:33 -04:00 |
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Thomas Harte
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4d5d5041df
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Attempted to ensure a clean startup.
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2017-08-01 22:18:42 -04:00 |
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Thomas Harte
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587eb3a67c
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Factored interrupt counting out of the CRTCBusHandler.
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2017-08-01 22:15:39 -04:00 |
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Thomas Harte
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8d39a20088
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Added proper output of mode 3, were anything ever to try to use it.
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2017-08-01 21:51:41 -04:00 |
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Thomas Harte
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4b6370eb86
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Realised my colour error: mapping the ROM numbers as though they were the hardware numbers. Having fixed that, spotted that I was deserialising R and B the wrong way around and dividing by too much. Colours now appear to be correct.
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2017-08-01 21:47:52 -04:00 |
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Thomas Harte
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c6e340a8a2
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Wired up the vsync signal. Pen 15 no longer flashes like crazy. Still can't figure out why the palette is so askew; was looking for perhaps some sort of detection of a green screen rather than a colour one, but there's no obvious input for that.
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2017-08-01 21:21:59 -04:00 |
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Thomas Harte
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31c7153301
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Corrected bit to colour mapping for modes 0 and 1. The total palette is still way off but there's consistency between modes now.
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2017-08-01 20:52:42 -04:00 |
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Thomas Harte
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7e04d00cc1
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Fixed key values, causing the new set of keys to work, decreased quantity of output and ensured that pixels appear in modes 0 and 2.
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2017-08-01 20:39:10 -04:00 |
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Thomas Harte
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eca9586a0f
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Fixed: input value is no longer overwritten by 0xff. The '0' key now works.
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2017-08-01 20:19:02 -04:00 |
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Thomas Harte
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2e4577f741
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Made a game attempt at implementing a (sticky) keyboard. No effect yet.
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2017-08-01 17:52:05 -04:00 |
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Thomas Harte
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f5b278d683
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Added enough stuff to put the emulated Amstrad CPC in a state of knowing whether its '0' key is pressed.
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2017-08-01 17:31:56 -04:00 |
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Thomas Harte
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e6854ff8db
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Corrected typo: the input to an AY is BDIR, not BCDIR.
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2017-08-01 17:06:57 -04:00 |
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Thomas Harte
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3b292273c7
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Fixed: BC2 is always implicitly set. The machine is now periodically checking the AY's register 14 (i.e. the first input port), so probably there's enough here now to implement keyboard input.
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2017-08-01 17:05:11 -04:00 |
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Thomas Harte
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cb732e5d5f
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Made an attempt to wire in an [unclocked] AY, in an endeavour to get to keyboard reading.
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2017-08-01 17:01:58 -04:00 |
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Thomas Harte
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08ad35efd9
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It's barely an implementation of the 8255, but ensured that data is bounced into the PortHandler, conveniently assuming the interaction mode used by the CPC.
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2017-08-01 16:34:13 -04:00 |
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Thomas Harte
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58b98267fc
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Formally transferred ownership of PIO accesses to an incoming template, and decided to start being explicit about how to specify the interfaces and provide fallbacks for optional behaviour for the new, clean generation of interfaces. A full-project sweep will inevitably occur but I'll try to tie off this branch first.
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2017-08-01 16:15:19 -04:00 |
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Thomas Harte
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a27946102a
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Took a shot at the interrupt counter. Attempts at keyboard reading now recur so it'll probably do for now. I think that next puts me into the realm of needing to implement the 8255.
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2017-08-01 15:49:16 -04:00 |
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Thomas Harte
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6ac7132799
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Had a quick go at properly outputting Mode 1, adding wiring to communicate palette and mode changes to the CRTC bus handler. Colours are off but it's sufficient for now.
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2017-08-01 15:16:13 -04:00 |
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