1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-05 06:05:27 +00:00
Commit Graph

2882 Commits

Author SHA1 Message Date
Thomas Harte
055e9cdf8d Differentiate unmapped and mapped-for-handler. 2023-01-16 19:52:40 -05:00
Thomas Harte
a5b9bdc18c Eliminate speculative apply_mapping. 2023-01-16 11:53:04 -05:00
Thomas Harte
eb51ff5cdf Add RAM paging. 2023-01-16 11:52:08 -05:00
Thomas Harte
1769c24531 Avoid ambiguous naming. 2023-01-16 11:43:43 -05:00
Thomas Harte
1a58ddaa67 Increase notes for future self. 2023-01-15 23:12:36 -05:00
Thomas Harte
183cb519e7 Give autonomy to secondary slots. 2023-01-15 22:51:17 -05:00
Thomas Harte
68361913ee Substitute VDP for the MSX 2. 2023-01-14 22:05:59 -05:00
Thomas Harte
1e17fc71ab Add an RP-5C01 to the MSX 2. 2023-01-14 14:52:07 -05:00
Thomas Harte
18def0c97d Correct extension ROM visibility. 2023-01-13 22:22:58 -05:00
Thomas Harte
f0a4d1d8ec Wire up did-page notifications. 2023-01-13 21:54:59 -05:00
Thomas Harte
50b5122969 For an MSX 2, the extension ROM is obligatory. 2023-01-13 14:18:39 -05:00
Thomas Harte
9f450b3ccb Expose the extension ROM to an MSX 2. 2023-01-13 14:16:12 -05:00
Thomas Harte
4190d25698 Ensure RAM is properly sized and available. 2023-01-13 14:07:54 -05:00
Thomas Harte
befc81743a Fix base RAM mapping. 2023-01-13 09:31:56 -05:00
Thomas Harte
23ff3fc366 Ensure all routes go somewhere. 2023-01-13 08:05:12 -05:00
Thomas Harte
78ce439b9b Add missing header; correct type. 2023-01-12 23:08:01 -05:00
Thomas Harte
ce440d52b3 Standardise name. 2023-01-12 23:02:24 -05:00
Thomas Harte
2e7e5ea12b Fleshes out most of a cleaner memory slot layout. 2023-01-12 23:01:11 -05:00
Thomas Harte
0d8c014099 Secondary slot selections are per primary slot. 2023-01-11 13:15:00 -05:00
Thomas Harte
fee82d3baa Fix typo. 2023-01-11 13:14:42 -05:00
Thomas Harte
76ad465030 Also seek the extension ROM for the MSX 2. 2023-01-11 12:56:09 -05:00
Thomas Harte
483ee8a74f Add a catch for the secondary paging register. 2023-01-10 22:24:40 -05:00
Thomas Harte
520ae7f2b2 Pick generic BIOS based on machine type. 2023-01-10 22:15:01 -05:00
Thomas Harte
ae5b81c0ab Add MSX 2 to the ROM catalogue. 2023-01-10 18:17:17 -05:00
Thomas Harte
6bd261b222 Add storage for secondary paging. 2023-01-10 18:07:31 -05:00
Thomas Harte
53bb17c848 Use model as a compile-time MSX configurator. 2023-01-10 14:55:57 -05:00
Thomas Harte
73549eb38c Document quite a bit more, to refresh my memory. 2023-01-10 14:40:03 -05:00
Thomas Harte
ef67205ce8 Set pixel count per mode. 2023-01-08 21:31:00 -05:00
Thomas Harte
794adf470b Break assumption that cycles = pixels; fix pixel clocking. 2023-01-08 21:25:22 -05:00
Thomas Harte
e8aab1fd2a Restore proper VDP selection. 2022-12-31 21:54:14 -05:00
Thomas Harte
ffb0b2ce0b Eliminate runtime duplication of personality. 2022-12-31 21:50:57 -05:00
Thomas Harte
7d6eac2895 Template the TMS on its personality.
Template parameter currently unused, but preparatory to other improvements.
2022-12-31 15:08:33 -05:00
Thomas Harte
ee22a98c17 Add note to future self. 2022-12-27 20:23:25 -05:00
Thomas Harte
28b4f51cb3 Add a SCSI activity indicator. 2022-11-16 11:31:10 -05:00
Thomas Harte
2f78a1c7af Add SCSI controller inclusion logic. 2022-09-15 12:17:50 -04:00
Thomas Harte
dc35ec8fa0 Merge branch 'master' into AppleIISCSI 2022-09-15 12:05:58 -04:00
Thomas Harte
36c3cb1f70 Deal with pre-ROM03 case, now that it's easy. 2022-09-13 16:31:06 -04:00
Thomas Harte
6773a321c1 Switch to portable direct bitwise logic. 2022-09-13 16:02:49 -04:00
Thomas Harte
ffdf44ad4f Switch to overt use of std::fill. 2022-09-13 15:39:17 -04:00
Thomas Harte
cbfd8e18e8 Eliminate repetitive magic constants. 2022-09-02 15:54:16 -04:00
Thomas Harte
8dc1aca67c Add TODO shout-outs. 2022-08-31 21:20:08 -04:00
Thomas Harte
df29a50738 Attempt to support the DMA interface. 2022-08-31 15:33:48 -04:00
Thomas Harte
7996fe6dab 'Clock' the SCSI bus (i.e. make it aware of passing time). 2022-08-30 16:40:25 -04:00
Thomas Harte
4df2a29a1f Add storage to the bus. 2022-08-24 15:23:50 -04:00
Thomas Harte
6010c971a1 Provide a volume to the SCSI card if one is received. 2022-08-23 15:11:56 -04:00
Thomas Harte
ea4bf5f31a Provide card's SCSI ID. 2022-08-23 15:05:36 -04:00
Thomas Harte
f4c242d5e9 Attempt to offer centralised C8 region decoding. 2022-08-23 14:50:44 -04:00
Thomas Harte
0595773355 Invents a new virtual select line for extended handling card ROM areas. 2022-08-23 14:41:45 -04:00
Thomas Harte
f89ca84902 Add missing include. 2022-08-22 21:44:33 -04:00
Thomas Harte
246bd5a6ac Merge branch 'master' into AppleIISCSI 2022-08-22 17:09:57 -04:00