162 Commits

Author	SHA1	Message	Date
Thomas Harte	f0f149c018	Simplified paging logic.	2017-11-29 20:49:02 -05:00
Thomas Harte	aa4eef41d8	Seeks to introduce MSX interrupts.	2017-11-29 20:31:55 -05:00
Thomas Harte	69ec8a362e	Makes an attempt to perform MSX memory paging.	2017-11-28 21:56:15 -05:00
Thomas Harte	d33612def5	Ensures the MSX provides a clock to the VDP.	2017-11-26 20:07:30 -05:00
Thomas Harte	9cb6ca3440	Adds elementary decoding of VDP accesses.	2017-11-26 20:01:11 -05:00
Thomas Harte	e957e40b14	Shifts 8255 logging up into its own port handler. That's probably fine for now.	2017-11-26 18:59:29 -05:00
Thomas Harte	7a8a43a96a	Adds just enough of the MSX memory map for the Z80 to appear to try to do useful things.	2017-11-26 18:34:40 -05:00
Thomas Harte	0eb5dd9688	Introduces the fundamentals of bus routing for the MSX.	2017-11-26 16:47:59 -05:00
Thomas Harte	a14b53a9ab	Adds a TMS9918 skeleton plus enough in the MSX to get to a blank screen in SDL/kiosk mode.	2017-11-26 13:28:26 -05:00
Thomas Harte	576d554a2c	Expands upon the MSX skeleton.	2017-11-25 13:33:51 -05:00
Thomas Harte	324b57c054	Adds inclusion of the 3/4 of the MSX's support chips that are currently implemented.	2017-11-24 22:05:50 -05:00
Thomas Harte	ae50ca9ab2	Moves the MSX class to the appropriate place and gives it a Z80.	2017-11-24 21:59:54 -05:00