Thomas Harte
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f3d3e588fd
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Add enough of state to [sort-of] pass the first test.
i.e. until the processor overruns, as it is permitted to do, and can't handle the second instruction.
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2022-05-17 16:51:26 -04:00 |
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Thomas Harte
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4a40581deb
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Completes performance of NBCD D0.
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2022-05-17 16:10:20 -04:00 |
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Thomas Harte
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eed2672db5
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Add documentation, honour signal_will_perform .
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2022-05-17 15:05:11 -04:00 |
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Thomas Harte
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84071ac6d0
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Implement reset logic, advance as far as actually performing an NBCD on D0 (but not writing it back).
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2022-05-17 14:51:49 -04:00 |
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Thomas Harte
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1a27eea46c
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Establish general pattern for selecting a performance phase and obtaining operands.
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2022-05-17 14:08:50 -04:00 |
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Thomas Harte
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d0b6451f02
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Step gingerly on to fetching operands.
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2022-05-17 08:26:35 -04:00 |
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Thomas Harte
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2147c5a5f2
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Fill in missing #undefs.
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2022-05-16 21:02:25 -04:00 |
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Thomas Harte
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c7aa4d8b6d
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Fix state transitions.
Confirmed that the 68000 mk 2 now appears correctly to perform a reset.
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2022-05-16 21:00:25 -04:00 |
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Thomas Harte
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e94efe887c
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Switch to use of __COUNTER__.
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2022-05-16 20:38:17 -04:00 |
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Thomas Harte
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3db2de7478
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Works 68000 mk2 into the comparative tests.
... revealing that I've leant a little too hard on __LINE__.
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2022-05-16 20:04:13 -04:00 |
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Thomas Harte
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345f7c3c62
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Fill in just enough to attempt the reset exception, assuming DTACK rather than VPA or BERR.
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2022-05-16 16:57:40 -04:00 |
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Thomas Harte
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6f6e466c08
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Make a first sketch of the coroutine-esque structure I'm going to experiment with here.
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2022-05-16 11:59:03 -04:00 |
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Thomas Harte
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b0518040b5
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Plants the seek of a 68000 mark 2.
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2022-05-16 11:44:16 -04:00 |
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