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4,261 Commits 8 Branches 121 Tags 496 MiB
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Commit Graph

47 Commits

Author SHA1 Message Date
Thomas Harte
0822c96ce0 Implements the proper row counter values for > 192 row modes. 2018-10-19 22:37:56 -04:00
Thomas Harte
4cd65eab5c Seeks to avoid bad macro expansion. 2018-10-18 22:36:25 -04:00
Thomas Harte
da00c832f5 Corrects colour fetching for multicolour text mode. 2018-10-18 20:38:00 -04:00
Thomas Harte
8ff265c3a1 Corrects multicolour text mode. 2018-10-18 20:25:42 -04:00
Thomas Harte
1fc88c4eff Corrects off-by-one error in line fetching coroutines. 2018-10-16 21:36:31 -04:00
Thomas Harte
5dfe7d8596 Corrects most of TMS sprite drawing. 2018-10-16 20:49:04 -04:00
Thomas Harte
231009b901 Makes faulty attempt to reintroduce TMS-mode sprites. 2018-10-16 20:00:06 -04:00
Thomas Harte
1c5f939aea Reintroduces tiles and some element of sprites in regular TMS mode. 2018-10-14 21:52:13 -04:00
Thomas Harte
c1e6406fc9 Corrects sprite accumulation. 2018-10-14 19:56:09 -04:00
Thomas Harte
d66979c68f Switched to a very large number of buffers, and resolved stupid attempt to reassign a reference. 2018-10-14 18:19:11 -04:00
Thomas Harte
6c09abc6cb Makes a flawed attempt to reformulate this exactly as two separate processes on a common clock with an interchange buffer. 
Specifically because closer inspection of the TMS modes shows it isn't quite valid to model output of one line as having fully completed prior to fetching of the next. So some sort of extra buffer is required. At which point it is most natural to continue with the logic that each fetch routine is oriented around the fetching process for a single line, and each output routine has the same view, suggesting separate read/write addresses.

Something is wrong though, as video data is being output too rapidly (I think) and with occasional sync issues (again: subject to investigation).
 2018-10-14 16:23:45 -04:00
Thomas Harte
9e52ead09a Ensures sprite scanning doesn't improperly set collision flag; that slot 151 is filled. 2018-10-12 19:50:48 -04:00
Thomas Harte
f6af6778ab Moves scrolling latch to proper position and implements 4-window fetching offset. 2018-10-11 22:36:27 -04:00
Thomas Harte
52e02db5c8 Introduces horizontal counter latching and reading. 
Then makes a new guess at frame IRQ position. But gets it wrong. Hmmm.
 2018-10-11 19:56:32 -04:00
Thomas Harte
2e379b0834 Adds latching of scroll values. 2018-10-10 21:28:18 -04:00
Thomas Harte
f00f6c8c23 Allows the frame interrupt to be placed anywhere in the frame. 2018-10-10 21:07:39 -04:00
Thomas Harte
50e23f4a2e Fixes 16px-high sprites. 2018-10-10 20:34:00 -04:00
Thomas Harte
e410302237 Switches to real SMS line output composition. 
Including setting the sprite collision bit.
 2018-10-08 22:43:10 -04:00
Thomas Harte
bca2161a05 Fixes TMS text mode for the new addressing order. 2018-10-07 21:09:01 -04:00
Thomas Harte
6975ed22c0 Doubles down on address-storage format, and implements the vertical scrolling lock. 2018-10-07 18:55:35 -04:00
Thomas Harte
3bead07043 Introduces proper indirection for sprite patterns. 
This seems to work, so the onus is now back on the rendering loop.
 2018-10-07 17:15:42 -04:00
Thomas Harte
ee20e42372 Makes initial attempt at collecting sprite contents. 
With test plotting, indicating some sort of issue.
 2018-10-07 16:53:25 -04:00
Thomas Harte
df411b4ede Corrects storage of visible sprites. 2018-10-07 16:40:32 -04:00
Thomas Harte
bfb9d8ccb6 At least attempts to use proper addressing for sprite info fetches. 2018-10-07 14:32:20 -04:00
Thomas Harte
338aec2930 Groups background fetches and experimentally seeks to daub sprites as white. 2018-10-06 22:07:04 -04:00
Thomas Harte
e6510dc87b Attempts to get at least as far as picking visible sprite indices. 2018-10-06 19:27:19 -04:00
Thomas Harte
7830cda912 Implements line querying and most of line interrupts. 2018-10-04 22:50:35 -04:00
Thomas Harte
858721a7a5 Added left border hiding. 2018-10-04 18:52:23 -04:00
Thomas Harte
de4e5c40aa Implements horizontal scrolling lock. 2018-10-03 23:28:33 -04:00
Thomas Harte
05248ab990 Starts to reimplement Master System output. 2018-10-03 23:13:21 -04:00
Thomas Harte
499fc62187 Sets things up for implementation of the inner mode-specific logic. 2018-10-02 21:58:09 -04:00
Thomas Harte
5361120353 Restores a stable frame. 2018-10-02 21:05:30 -04:00
Thomas Harte
60bab8fdf1 Starts to reformulate TMS collection as coroutines. 
For the time being, thereby breaks all video. A static screen of the border colour is all you'll see.
 2018-10-01 23:03:17 -04:00
Thomas Harte
91aa8f9295 Amps up colour content a little. 2018-09-30 20:47:26 -04:00
Thomas Harte
23191efc05 Starts writing and referring to colour RAM for colours. 2018-09-29 19:50:13 -04:00
Thomas Harte
0d8af010b6 Takes a stab at tile reversal and vertical scrolling. 2018-09-28 22:37:10 -04:00
Thomas Harte
7b9bb772ca Corrected to give a not-exactly-indexed-correctly approximation of what's on display. 2018-09-28 21:03:51 -04:00
Thomas Harte
f7e211c245 Makes first attempt to put something vaguely like the Master System tile map on screen. 2018-09-28 20:39:14 -04:00
Thomas Harte
35c2e74af8 Attempts to establish a coroutine-ish structure for access patterns. 
The Master System mode, inevitably, is the test case.
 2018-09-27 22:33:41 -04:00
Thomas Harte
19482a563f Attempts to explicitly make room for the SMS VDP mode. 2018-09-27 21:22:57 -04:00
Thomas Harte
9683c8f664 Advances towards the Master System actually receiving interrupts. 2018-09-23 15:58:23 -04:00
Thomas Harte
e7f4babf41 Starts taking steps towards SMS/GG and V9938/9958 support. 
Specifically: routine namespace stuff, plus the intention to move to a table-based operation+cost version of timing. Reordering works fine for the TMS, and probably would also for the SMS/GG, but it'd be problematic with the command engine of the V9938/9958 and maintaining a consistent set of code is easier.
 2018-09-17 22:59:16 -04:00
Thomas Harte
0b771ce61a Removes all instances of the copyright symbol. 2018-05-13 15:19:52 -04:00
Thomas Harte
bcc7ad0c30 Corrects bad TMS sprite selections on the top row of the screen. 2018-01-06 16:26:11 -05:00
Thomas Harte
ac80d10cd8 Separates the component parts of running an audio stream: task deferral, filtering and generation. 
Walking towards improving opportunities for composition.
 2017-12-17 21:26:06 -05:00
Thomas Harte
ec4c259695 Removes unused file. 2017-12-14 21:19:09 -05:00
Thomas Harte
aca7842ca4 Better documents and tidies the TMS9918. 2017-12-14 20:27:26 -05:00