38 Commits

Author	SHA1	Message	Date
Thomas Harte	64586ca7ba	Implement BTST/etc.	2022-05-04 20:57:22 -04:00
Thomas Harte	15c90e546f	Fix rotates and shifts to memory.	2022-05-04 19:44:59 -04:00
Thomas Harte	5d1d94848c	Take a bash at LINK and UNLK.	2022-05-04 08:26:11 -04:00
Thomas Harte	de58ec71fd	Fix EXT, SWAP.	2022-05-03 20:17:36 -04:00
Thomas Harte	052ba80fd7	Add enough wiring to complete but fail EXT and JMP/JSR.	2022-05-03 15:49:55 -04:00
Thomas Harte	af973138df	Correct decoding of Bcc.b, satisfying Bcc and BSR tests.	2022-05-03 15:32:54 -04:00
Thomas Harte	5a87506f3d	Fix Bcc, making decision that add_pc is relative to start of instruction.	2022-05-03 15:21:42 -04:00
Thomas Harte	90f0005cf2	Proceed to failing Bcc and flagging up my lack of an implementation for BSR.	2022-05-03 14:45:49 -04:00
Thomas Harte	d8b3748d24	Fix Scc size, DBcc behaviour.	2022-05-03 14:40:51 -04:00
Thomas Harte	1b224c961e	Fix Scc, add operand flags for DBcc.	2022-05-03 14:23:57 -04:00
Thomas Harte	b3cf13775b	Consume operand_flags into Instruction.hpp.	2022-05-03 11:09:57 -04:00
Thomas Harte	c61809f0c4	Add CMPAl.	2022-05-03 09:20:02 -04:00
Thomas Harte	2f2d6bc08b	Correct CMPw.	2022-05-03 09:05:34 -04:00
Thomas Harte	1bb809098c	Switch — messily — to a more compact way of indicating sequence.	2022-05-03 09:04:54 -04:00
Thomas Harte	011506f00d	Add basic exceptions.	2022-05-02 21:27:58 -04:00
Thomas Harte	25ab478461	Fix immediate byte and word fetches.	2022-05-02 20:17:44 -04:00
Thomas Harte	7efe30f34c	Fix (d8, _, Xn) calculation.	2022-05-02 15:09:59 -04:00
Thomas Harte	3827ecd6d3	Proceed to complete test running.	2022-05-02 12:57:45 -04:00
Thomas Harte	73f340586d	Proceed to building, but failing tests.	2022-05-02 07:45:07 -04:00
Thomas Harte	56fe00c5fb	Correct errors preparatory to Executor's lack of flow controller actions.	2022-05-01 20:40:57 -04:00
Thomas Harte	3c26177239	Provide both compile- and run-time operation selection options.	2022-05-01 17:39:56 -04:00
Thomas Harte	fe8f0d960d	Equivocate. ... (Specifically: addresses cannot generally be obtained in advance, as they are often the product of registers, but things like displacements, immediate values and absolute addresses can)	2022-05-01 15:30:03 -04:00
Thomas Harte	c72caef4fd	Correct further size specifiers.	2022-05-01 15:21:58 -04:00
Thomas Harte	0720a391e8	Correct address register mutations.	2022-05-01 15:18:06 -04:00
Thomas Harte	d16ac70a50	Correct include path.	2022-05-01 15:14:12 -04:00
Thomas Harte	fc8e020436	Improve field name.	2022-05-01 15:12:13 -04:00
Thomas Harte	6b073c6067	Attempt to round out addressing modes, shift to a header, as per templating on BusHandler.	2022-05-01 15:10:54 -04:00
Thomas Harte	52f355db24	Decision: operation is not a template parameter. Hence can use condition as fully typed.	2022-04-30 14:08:51 -04:00
Thomas Harte	e4426dc952	Introduce calculate EA steps.	2022-04-29 20:30:48 -04:00
Thomas Harte	9359f6477b	Start drafting an Executor.	2022-04-29 17:12:06 -04:00
Thomas Harte	78b60dbd1a	Evict MOVEM and MOVEP, enable TRAP and TRAPV, complete CHK.	2022-04-29 14:43:30 -04:00
Thomas Harte	8066b19f93	Correct typos.	2022-04-29 07:57:02 -04:00
Thomas Harte	abd2a831a3	Added a further ambiguity.	2022-04-29 05:08:44 -04:00
Thomas Harte	824d3ae3f7	Conclusion: a union does produce better code. ... (But needn't be so verbose)	2022-04-29 04:51:02 -04:00
Thomas Harte	727a14c6f9	Add notes for myself on decisions yet to make.	2022-04-29 03:53:17 -04:00
Thomas Harte	13d20137d3	Tackle two lingering references to exception_handler.	2022-04-29 03:38:23 -04:00
Thomas Harte	33c9ea2cf7	A flow controller feels more natural than an exception handler.	2022-04-28 20:42:04 -04:00
Thomas Harte	1d8d2b373b	Port all simple instruction bodies.	2022-04-28 16:55:47 -04:00