18 Commits

Author	SHA1	Message	Date
Thomas Harte	69122cdec4	Swing at zero-indexed addressing.	2025-10-22 17:12:23 -04:00
Thomas Harte	d730168631	Remove dead label.	2025-10-22 13:30:24 -04:00
Thomas Harte	2f210ebe3b	Fix IndexedIndirect/IndirectIndexed confusion, proceed to test 0x14.	2025-10-22 13:29:45 -04:00
Thomas Harte	693b53baa2	Proceed through absolute addressing to test 0x10.	2025-10-22 13:05:46 -04:00
Thomas Harte	45363922b5	Adds rolls and shifts, and zero-page addressing.	2025-10-22 12:56:07 -04:00
Thomas Harte	0463c1ceda	Reduce repetition.	2025-10-21 23:21:11 -04:00
Thomas Harte	b35a55a658	Implement jamming.	2025-10-21 23:16:59 -04:00
Thomas Harte	4da68c9fa8	Implement IndirectIndexedRead.	2025-10-21 23:01:41 -04:00
Thomas Harte	72f133f31b	Do enough work to verify BRK.	2025-10-21 22:07:35 -04:00
Thomas Harte	b5899a2e42	Implement simplest operations.	2025-10-21 17:33:36 -04:00
Thomas Harte	4ee8f8564e	Catch unimplemented.	2025-10-21 13:40:23 -04:00
Thomas Harte	ff08c03bc5	Coral into building.	2025-10-21 13:31:48 -04:00
Thomas Harte	95dd430b0d	Shoehorn in an invocation.	2025-10-21 13:12:58 -04:00
Thomas Harte	20eb8b1442	Move RDY inline.	2025-10-21 12:59:16 -04:00
Thomas Harte	2d6a0b3ed0	Add a branch to nowhere.	2025-10-20 23:08:04 -04:00
Thomas Harte	fde0e2434e	Attempt to transcribe base 6502 instruction set.	2025-10-20 22:50:14 -04:00
Thomas Harte	2cdf6ac8f9	Add interrupt, RDY and instruction fetch logic.	2025-10-20 13:16:03 -04:00
Thomas Harte	309c58a93d	Include in CI builds; start implementation.	2025-10-19 23:29:27 -04:00