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Author	SHA1	Message	Date
Thomas Harte	21ca1ef86b	Started attempting to clarify instance variable usage.	2016-03-12 23:19:10 -05:00
Thomas Harte	4462bb92f8	Moved interrupt back down to where it's probably meant to be.	2016-03-12 23:18:46 -05:00
Thomas Harte	cdff90f20d	Fixed: setting an interrupt control value with the lowest bit set could result in interrupts that can't be disabled.	2016-03-12 22:55:33 -05:00
Thomas Harte	6327311130	Made an attempt to separate and clarify on tape interrupts.	2016-03-12 20:32:26 -05:00
Thomas Harte	cfa616d593	Fixed: timing issue versus supplied test ROM was failure to include the Plus 1 ROM in the mix.	2016-03-12 11:51:20 -05:00
Thomas Harte	763d5e8819	Access timing now appears to be exactly on the nail. Disabled automatic interrupt expiration again as I'm not persuaded it's correct for at least the RTC.	2016-03-10 23:12:28 -05:00
Thomas Harte	e305fd9326	Adjusted numbers, empirically.	2016-03-10 22:40:18 -05:00
Thomas Harte	a89225987f	Blank lines are back.	2016-03-10 22:19:54 -05:00
Thomas Harte	b836d74e18	Believing the previous implementation to be overly complicated through premature optimisation, simplified video. It's slightly slower now. Will need work. Immediately to do: figure out how to deal with blank scan lines.	2016-03-10 22:08:50 -05:00
Thomas Harte	20ac630e4d	Some minor optimisations and timing tweaks. Nothing of substance.	2016-03-10 19:58:50 -05:00
Thomas Harte	df3fff51c7	These interrupts apparently last only 64µs at most.	2016-03-10 19:10:53 -05:00
Thomas Harte	f232a12fad	Fixed RAM timings: it's at least two and possibly three cycles to access RAM, and an access that overlaps with video fetch in Modes 0–3 will cost the length of the video fetch rather than somehow finishing in time.	2016-03-10 19:04:43 -05:00
Thomas Harte	7255408313	Experimented with going back to horizontal sync on leading edge; not sure so (temporarily?) disabled.	2016-03-08 22:54:05 -05:00
Thomas Harte	68da673a95	Wrapped this up as explicitly only the Mac thing to do.	2016-03-08 22:53:29 -05:00
Thomas Harte	bf5747f83e	Made an attempt to chop out all the stuff of building up the OpenGL data from the stuff of parsing input.	2016-03-08 22:40:23 -05:00
Thomas Harte	14b2927275	Made further attempts to tidy up; trying to demarcate between public interface and private.	2016-03-08 20:59:16 -05:00
Thomas Harte	c7976dd657	Started trying to clean up my Outputs namespace by moving stuff related to the CRT underneath a separate subnamespace.	2016-03-08 20:49:07 -05:00
Thomas Harte	bb09a5f58c	The attribute locations don't really need to be stored. They can be transient.	2016-03-07 21:42:21 -05:00
Thomas Harte	6dfe877c43	Basic attempts to organise myself into shape for composite output continue.	2016-03-07 21:22:47 -05:00
Thomas Harte	1e5fe2b2c1	Made an attempt to reestablish the Atari 2600 output connection despite various changes (TODO: generalise that stuff), and to start creating the composite shader.	2016-03-07 21:04:04 -05:00
Thomas Harte	2de229152f	Started sketching out shaders to do the first part of the composite conversion.	2016-03-07 19:21:04 -05:00
Thomas Harte	cd9c62acca	Still stepping slowly towards a working composite mode, switched the RGB sampling function to returning a vec4, which may be of benefit to any machine with a brightness part of an RGB signal, and started edging towards at least having the correct GLSL programs ready for converting composite output.	2016-03-07 19:08:26 -05:00
Thomas Harte	3b6c9c15a1	Switching momentarily back to monitor mode, resolved why I was suddenly getting no output upon creating some texture targets.	2016-03-07 18:55:15 -05:00
Thomas Harte	eefd17ed4c	Fixed sync response in composite scan output generation and stored texture coordinates.	2016-03-05 21:52:22 -05:00
Thomas Harte	6cddb4c9c8	Added a first attempt to generate output scans for composite mode. So this in theory completes the CPU side of composite operations. Though I'm sure problems will reveal themselves.	2016-03-05 21:18:28 -05:00
Thomas Harte	3f39803d32	Switched to triangle strips, to eliminate the need for any temporary storage for the composite output path.	2016-03-05 20:47:11 -05:00
Thomas Harte	23c223e2ed	Started edging towards completing the CPU side of accumulating enough data for composite decoding.	2016-03-05 17:55:18 -05:00
Thomas Harte	5c8db71c64	Corrected some constants, ensured both machines (so far) are setting the output device.	2016-03-05 16:19:10 -05:00
Thomas Harte	41c09f8c3f	Renamed CSCathodeRayView to CSOpenGLView as it no longer has any CRT-related responsibilities. It just does the GL and manages a serial dispatch queue.	2016-03-05 14:45:09 -05:00
Thomas Harte	70b6d51451	Ever more baby steps back towards composite decoding.	2016-03-05 14:36:12 -05:00
Thomas Harte	95efeb1d56	Ensured all delegate and responder delegate messages occur on the same queue.	2016-03-05 14:35:47 -05:00
Thomas Harte	c754a6e45a	Decoupled execution speed and frame rate; cleaned up.	2016-03-03 22:12:31 -05:00
Thomas Harte	2f7626a5e0	Okay, this definitely definitely is supposed to be this way around.	2016-02-28 22:00:05 -05:00
Thomas Harte	3449120c24	Added a note to future self, put the scan edge generator back to the way round it was before.	2016-02-27 22:51:37 -05:00
Thomas Harte	60d35fa72b	Requested multisampling, if available, rather than supersampling.	2016-02-27 22:46:31 -05:00
Thomas Harte	7839d93344	With the provision of an extra hint to the CRT and, finally, the realisation about why my scans weren't exactly joining up, improved output precision.	2016-02-27 22:39:01 -05:00
Thomas Harte	1c6de7692d	Made an attempt to fix tape output interrupts; offloaded raster width and placing conversion to the GPU.	2016-02-27 20:37:41 -05:00
Thomas Harte	db18c85423	Simplified the run builder rather; put a double check of Electron timing in place.	2016-02-25 22:01:42 -05:00
Thomas Harte	1eea28b692	Disabled some debugging parts, added some others, marked some things as inline. Ticking over.	2016-02-22 23:35:42 -05:00
Thomas Harte	4b28e7b974	Switched back to a single array and vertex buffer.	2016-02-21 22:54:55 -05:00
Thomas Harte	2b8fb5b615	Made an attempt to fix my 0114 implementation.	2016-02-20 23:13:58 -05:00
Thomas Harte	f7fc7cb932	Implemented some portion of 0114; ensured I'm safely skipping chunks in all cases.	2016-02-20 22:18:00 -05:00
Thomas Harte	ec3cccbb0d	Working towards HQ UEF support: fixed bug whereby writing to tape output would reset input pulse stepper; added support for chunk 0116 and approximate support for 0113.	2016-02-20 22:03:14 -05:00
Thomas Harte	3754cf4bce	Played about with interrupt timing.	2016-02-20 21:24:02 -05:00
Thomas Harte	574985f9a2	Fixed interlaced timing; switched to a more robust detector for horizontal sync; eliminated some test logging.	2016-02-20 20:29:40 -05:00
Thomas Harte	00f414d757	Made an attempt to reintroduce interlacing and screen modes with gaps. Something's wrong with synchronisation though, so most likely I'm outputting a bad signal.	2016-02-20 17:32:51 -05:00
Thomas Harte	68992a62f9	Switched to a subtler to out-of-band syncs.	2016-02-20 00:16:07 -05:00
Thomas Harte	da361be3ee	This might be more accurate? Probably not. Who knows?	2016-02-20 00:13:43 -05:00
Thomas Harte	518c134348	Blank lines are missing (if the double negative can be forgiven) but the framebuffer is otherwise seemingly working well again.	2016-02-20 00:11:23 -05:00
Thomas Harte	a3432120f3	Fixed synchronisation — my two fields weren't of equal length, I wasn't breaking calls to the CRT upon 40/80 transitions, I had the wrong maximum run length. Now I just need to put real pixels back in.	2016-02-19 23:57:57 -05:00