191 Commits

Author	SHA1	Message	Date
Thomas Harte	c076636df1	Fix typo.	2023-11-30 14:26:26 -05:00
Thomas Harte	c397da3e5a	Add TODOs.	2023-11-30 12:52:08 -05:00
Thomas Harte	5f6bbec741	Capture DMA high bytes, add actor for accesses.	2023-11-30 12:47:50 -05:00
Thomas Harte	7f0bb716f7	Grab sector contents, ready for more FDC work.	2023-11-29 15:55:37 -05:00
Thomas Harte	b7d3633b38	Log slightly more.	2023-11-29 15:30:47 -05:00
Thomas Harte	05504c8389	Accept and keep hold of disk images.	2023-11-29 15:20:14 -05:00
Thomas Harte	8d01829fa7	Adopt PC-style naming, limit to one drive.	2023-11-29 11:35:21 -05:00
Thomas Harte	be842ee2f1	Add drive indicator lights.	2023-11-29 11:31:37 -05:00
Thomas Harte	e034daa6c8	Capture motor state.	2023-11-29 09:52:16 -05:00
Thomas Harte	ce4bcf9064	Improve comment.	2023-11-29 09:50:08 -05:00
Thomas Harte	a992ae37b1	Mildly rearrange, to match enum order.	2023-11-29 09:49:15 -05:00
Thomas Harte	fbbe3ab7f1	Include seek ended flag.	2023-11-29 09:45:45 -05:00
Thomas Harte	6e2e67fd46	Sculpt out enough to get to a read data command.	2023-11-29 09:42:43 -05:00
Thomas Harte	3827a084ad	Code to GlaBIOS expectations.	2023-11-28 23:18:22 -05:00
Thomas Harte	301442a0b1	Fix meaning of flag, use correctly.	2023-11-28 22:34:34 -05:00
Thomas Harte	dd4bcf68bf	Load up on debugging logs.	2023-11-28 15:09:57 -05:00
Thomas Harte	b860fba0a3	Make an attempt at providing varied sense interrupt statuses.	2023-11-28 14:12:39 -05:00
Thomas Harte	c19c356c10	Add disabled longer serialisation.	2023-11-27 23:23:00 -05:00
Thomas Harte	8fec9bef11	Attempt IRQ logic.	2023-11-27 23:16:24 -05:00
Thomas Harte	bffe3ffa25	Add an 8272 results phase.	2023-11-27 23:05:37 -05:00
Thomas Harte	291723e85e	Insert notes to self, trying to tie down FloppyController interface.	2023-11-27 10:27:36 -05:00
Thomas Harte	a6a464c240	Add printed TODO.	2023-11-25 21:40:13 -05:00
Thomas Harte	9bd75464b5	Proceed to receiving a sense interrupt status.	2023-11-25 18:15:37 -05:00
Thomas Harte	0bb048e24b	Start formalising/extracting 8272 status.	2023-11-25 18:10:49 -05:00
Thomas Harte	8c70317d31	Introduce interrupt.	2023-11-24 23:06:52 -05:00
Thomas Harte	dd135bf3fe	Start experimenting with a possible end-of-reset interrupt?	2023-11-24 22:41:33 -05:00
Thomas Harte	2efb5236f7	Add an agent for floppy control.	2023-11-24 22:19:39 -05:00
Thomas Harte	d5c30e3175	Add enough keyboard support to be able to bypass the initial FDC BIOS failure report.	2023-11-24 13:38:06 -05:00
Thomas Harte	89423f28ef	Limit extraneous printing.	2023-11-23 22:47:31 -05:00
Thomas Harte	019d987623	Clear buffer on read.	2023-11-23 22:16:08 -05:00
Thomas Harte	7e8020df59	Avoid a spurious initial interrupt.	2023-11-23 22:15:20 -05:00
Thomas Harte	44d602e0f6	Seriously attempt a keyboard controller.	2023-11-23 22:10:51 -05:00
Thomas Harte	0674da0325	Flip IRQ priority.	2023-11-23 15:41:24 -05:00
Thomas Harte	113fc9f757	Add further TODO.	2023-11-23 15:29:43 -05:00
Thomas Harte	2c31452629	Add TODO, as exposition.	2023-11-23 15:19:31 -05:00
Thomas Harte	505df78108	Add column duplication, switch to green.	2023-11-23 15:18:28 -05:00
Thomas Harte	d92d0e87ac	Honour MDA attributes.	2023-11-23 14:51:32 -05:00
Thomas Harte	df9e9c2c4d	Start accumulating notes.	2023-11-22 15:21:45 -05:00
Thomas Harte	e0f72f2048	Tidy up.	2023-11-22 14:18:58 -05:00
Thomas Harte	a293a3a816	Document the future.	2023-11-22 14:14:53 -05:00
Thomas Harte	b22b489380	Mask into 4kb; I don't know whether hardware scrolling is in use.	2023-11-22 14:12:57 -05:00
Thomas Harte	231de8440e	Add text display.	2023-11-22 14:11:22 -05:00
Thomas Harte	381537fde9	Get as far as MDA being able to fetch.	2023-11-22 13:52:28 -05:00
Thomas Harte	f249e4ada6	Maintain an actual pixel buffer.	2023-11-22 13:40:50 -05:00
Thomas Harte	12179e486f	Create a solid white rectangle.	2023-11-22 13:18:39 -05:00
Thomas Harte	80b2ccd418	Attempt to wire in a CRTC.	2023-11-22 12:53:09 -05:00
Thomas Harte	1828a10885	Use less branchy inner loop.	2023-11-21 22:42:53 -05:00
Thomas Harte	bcd4a2216a	Improve clocking.	2023-11-21 22:36:11 -05:00
Thomas Harte	3da3401125	Attempt full audio output.	2023-11-21 22:28:33 -05:00
Thomas Harte	972d1d1ddd	Add audio pipeline.	2023-11-21 22:11:32 -05:00
Thomas Harte	6329a1208a	Adopt PIT-centric timing.	2023-11-21 22:02:24 -05:00
Thomas Harte	375a9f9ff5	Pull out the PIC, DMA.	2023-11-21 15:50:38 -05:00
Thomas Harte	a1e118a1ff	Do some interrupt work.	2023-11-21 15:46:31 -05:00
Thomas Harte	83ca9b3af5	Hack in some MDA text logging. Boot seems to complete?	2023-11-21 11:37:36 -05:00
Thomas Harte	acdf32e820	Handle low/high switches.	2023-11-21 11:25:53 -05:00
Thomas Harte	931e6e7a56	Add, disable, logging detritus.	2023-11-21 11:19:47 -05:00
Thomas Harte	058080f6de	Prove to my caveman self that no text is being written.	2023-11-20 23:11:27 -05:00
Thomas Harte	c4e9f75709	Edge towards but don't quite reach interrupt.	2023-11-20 22:52:20 -05:00
Thomas Harte	695282b838	PIT output now reaches the PIC.	2023-11-20 22:36:05 -05:00
Thomas Harte	f0e2ef5e28	Attempt to implement square-wave mode.	2023-11-20 22:19:18 -05:00
Thomas Harte	ee6012f6e9	Evict the PIT.	2023-11-20 19:00:16 -05:00
Thomas Harte	d3e90ce006	Capture some basics. ... BIOS now seems to get as far as expecting channel 0 to trigger an interrupt, which never comes.	2023-11-20 15:36:52 -05:00
Thomas Harte	18ddc2c83a	Route traffic.	2023-11-20 15:11:22 -05:00
Thomas Harte	abf0eead7a	Add a functionless PIC.	2023-11-20 13:53:44 -05:00
Thomas Harte	a689f2b63e	Relocate comment.	2023-11-20 12:22:30 -05:00
Thomas Harte	a3066fc040	Advance to the missing PIC.	2023-11-20 12:21:37 -05:00
Thomas Harte	7eed254de9	Bring an 8255 into the mix.	2023-11-20 12:13:42 -05:00
Thomas Harte	55f466f2fa	Add enough of the DMA subsystem to trip over in PPI world.	2023-11-19 22:55:29 -05:00
Thomas Harte	119c83eb18	Fix field decoding.	2023-11-19 21:51:27 -05:00
Thomas Harte	4e077701c9	Exit without further modification upon latch.	2023-11-19 16:37:47 -05:00
Thomas Harte	a8f1c72f5c	Take a caveman run at debugging.	2023-11-19 16:05:44 -05:00
Thomas Harte	05e93f0eb3	Implementing counting for a couple of PIT modes.	2023-11-19 15:52:32 -05:00
Thomas Harte	af885ccf08	Decode PIT mode writes.	2023-11-19 15:01:21 -05:00
Thomas Harte	2b69081fff	Start sketching the PIT.	2023-11-19 07:15:30 -05:00
Thomas Harte	a91449555f	Add link for future self.	2023-11-17 17:38:17 -05:00
Thomas Harte	afc0ca3f1b	Add XT roadmap.	2023-11-17 17:35:11 -05:00
Thomas Harte	d202cfc2ca	Add TODO.	2023-11-17 17:09:20 -05:00
Thomas Harte	ec2d878e3f	End run around the template. ... I have yet to get any insight whatsoever on the reason for GCC's failure here and won't have access to a suitable test machine for a while so all I have for testing is the arduous CI cycle.	2023-11-17 17:02:46 -05:00
Thomas Harte	8af173c4bc	Remove hopeful hit.	2023-11-16 15:48:27 -05:00
Thomas Harte	e1541543c3	Play hit and hope.	2023-11-16 15:40:47 -05:00
Thomas Harte	99e7de5a8b	Colocate memory.	2023-11-16 15:24:35 -05:00
Thomas Harte	095359017f	Log first unhandled port.	2023-11-16 13:02:35 -05:00
Thomas Harte	25f0a373f3	Don't sign-extend ports (!).	2023-11-16 11:17:12 -05:00
Thomas Harte	832e31f7e5	Add note to self.	2023-11-16 10:34:24 -05:00
Thomas Harte	164a7fe848	Log port IO.	2023-11-16 06:48:24 -05:00
Thomas Harte	62b6219763	Install BIOS, albeit in writeable storage.	2023-11-15 22:02:53 -05:00
Thomas Harte	2bc9dfbef9	Albeit with no BIOS present, execute.	2023-11-15 16:10:37 -05:00
Thomas Harte	3b84299a05	Edge closer to PCCompatible doing _something_.	2023-11-15 15:58:49 -05:00
Thomas Harte	6f48ffba16	Add enough of a ScanProducer to run.	2023-11-15 14:30:30 -05:00
Thomas Harte	af7069ac21	Include and fetch a BIOS.	2023-11-15 11:32:23 -05:00
Thomas Harte	e927fd00d8	Do just enough to include x86 code in the main build.	2023-11-15 11:01:28 -05:00