Thomas Harte
5769944918
Shrinks MicroOp struct size from 16 bytes to 4.
2019-07-25 10:14:36 -04:00
Thomas Harte
9ef1211d53
Adds missing header file.
2019-07-24 22:13:32 -04:00
Thomas Harte
f2ae04597f
Updates test case.
2019-07-24 22:07:17 -04:00
Thomas Harte
1327de1c82
Slims the Program struct down to 8 bytes total.
2019-07-24 22:02:50 -04:00
Thomas Harte
827c4e172a
Cuts a third from the Program struct.
...
Observation: [source/destination]_address are always one of the address registers. So you can fit both within a single byte.
Net effect: around a 12% reduction in execution costs, given that this reduces the size of the instructions table from 3mb to 2mb.
2019-07-24 18:39:36 -04:00
Thomas Harte
c300bd17fa
Regularises as many source/destination sets as fit the current setter.
2019-07-24 18:22:44 -04:00
Thomas Harte
0187fd8eae
Hides all runtime Program member accesses behind macros.
...
... and fixes unit tests.
2019-07-24 12:01:30 -04:00
Thomas Harte
4aca6c5ef8
Adds a note of admission here.
2019-07-23 23:03:15 -04:00
Thomas Harte
fa226bb1b9
Seeks to reduce enquiry costs.
2019-07-17 15:09:26 -04:00
Thomas Harte
cac97a9663
Devolves drive responsibility.
2019-07-10 22:39:56 -04:00
Thomas Harte
2ccb564a7b
Throws some extra logging into place, to test the IWM changeover.
2019-07-10 21:39:45 -04:00
Thomas Harte
ed4ddcfda8
Reduces call/return overhead on Microcycle methods.
2019-07-09 19:55:30 -04:00
Thomas Harte
69b94719a1
Switches to faster bit count logic.
2019-07-09 18:41:20 -04:00
Thomas Harte
5078f6fb5c
Marginally reduces MOVE heft.
2019-07-09 18:07:11 -04:00
Thomas Harte
94457d81b6
Eliminates redundant and integer-size-troubling AND on ASL.
2019-07-08 18:33:50 -04:00
Thomas Harte
fb352a8d40
Ensures assert is completely excluded if NDEBUG.
2019-07-08 18:00:37 -04:00
Thomas Harte
b9c2c42bc0
Switches drives to using floats for time counting.
...
Hopefully to eliminate a lot of unnecessary `Time` work; inaccuracies should still be within tolerable range.
2019-07-02 15:43:03 -04:00
Thomas Harte
c4cbe9476c
Corrects EA selection logic, fixing MOVEP.
2019-07-02 13:54:21 -04:00
Thomas Harte
0a67cc3dab
Goes nuclear on ROXL and ROXR.
2019-07-01 23:05:48 -04:00
Thomas Harte
726e07ed5b
Corrects ASL overflow flag.
2019-07-01 19:46:58 -04:00
Thomas Harte
11d8f765b2
Corrects divide-by-zero exception length, enables all other DIVS checks.
2019-07-01 15:46:04 -04:00
Thomas Harte
514e57b3e9
Corrects DIVU timing and flags, improves DIVS.
2019-07-01 14:24:32 -04:00
Thomas Harte
d8fb6fb951
Corrects MULU timing.
2019-06-30 22:40:10 -04:00
Thomas Harte
255f0d4b2a
Corrects MULS timing.
2019-06-30 22:33:54 -04:00
Thomas Harte
8d0cd356fd
Corrects TRAP, TRAPV and CHK timing.
2019-06-29 21:25:22 -04:00
Thomas Harte
17666bc059
Corrects CHK flags.
2019-06-28 19:48:53 -04:00
Thomas Harte
241d29ff7c
Imports SBCD and NBCD tests, and fixes corresponding operation.
2019-06-28 19:39:08 -04:00
Thomas Harte
c5039a4719
Imports ANDI, ORI and EORI to SR tests.
...
Hence corrects supervisor/user privileges for SR/CCR.
2019-06-28 15:05:46 -04:00
Thomas Harte
6c588a1510
Makes some further random swings at tracking the startup procedure.
2019-06-28 13:03:47 -04:00
Thomas Harte
d81053ea38
Invents some additional PEA tests, and further fixes PEA.
2019-06-27 17:59:03 -04:00
Thomas Harte
8d39c3bc98
Takes a shot at fixing PEA for A7-relative addresses.
...
Unit tests required. Tomorrow.
2019-06-26 23:24:54 -04:00
Thomas Harte
c0591090f5
Imports DIVU tests.
2019-06-26 22:25:48 -04:00
Thomas Harte
538aecb46e
Imports CMP tests, and fixes CMP.l timing.
2019-06-26 22:02:04 -04:00
Thomas Harte
dbdbea85c2
Imports CMPA tests, and fixes CMPA.w.
2019-06-26 21:42:48 -04:00
Thomas Harte
ba2224dd06
Imports NEGX tests and thereby fixes NEGX's zero flag.
2019-06-26 19:39:04 -04:00
Thomas Harte
79066f8628
Imports NOT tests, fixes NOT overflow and carry flags.
2019-06-25 22:18:11 -04:00
Thomas Harte
2c813a2692
Imports CMPM tests and fixes CMPM.bw source/destination order.
2019-06-25 21:46:01 -04:00
Thomas Harte
d2cb595b83
Proactively attempts to fix CMPM PostInc addressing.
2019-06-25 21:24:03 -04:00
Thomas Harte
ecb5a0b8cc
Incorporates ADDX tests and fixes ADDX PreDec.
2019-06-25 19:18:07 -04:00
Thomas Harte
e12e8fc616
Incorporates ASR tests, and fixes ASR (xxx).w.
...
... which was re-injecting the wrong bit to preserve sign.
2019-06-25 18:44:31 -04:00
Thomas Harte
1fbbf32cd2
Adds ASL tests, and corrects ASL (xxx).w.
...
Overflow is wrong on other ASLs though, I think.
2019-06-25 18:09:01 -04:00
Thomas Harte
31edb15369
Reduces 68000 startup costs a little further.
2019-06-25 17:41:13 -04:00
Thomas Harte
e830d23533
Incorporates TRAPV tests.
2019-06-24 21:21:35 -04:00
Thomas Harte
9a666fb8cc
Imports NEG tests and fixes NEG.l Dn timing.
2019-06-24 19:43:30 -04:00
Thomas Harte
0e208ed432
Fixes cycle counting in the test machine.
2019-06-24 17:55:09 -04:00
Thomas Harte
c8b769de8a
Completes import of LSL tests and fixes various LSL issues.
...
Including LSL (xxx).w actually being LSR, and the carry flag generally being questionable.
2019-06-24 17:45:38 -04:00
Thomas Harte
c447655047
Resolves assumption that shifts greater than the bit count of the relevant int are well-defined in C.
2019-06-24 16:51:43 -04:00
Thomas Harte
3ec9a1d869
Incorporates JMP tests, fixes JSR (xxx).l timing.
2019-06-24 15:36:33 -04:00
Thomas Harte
faef917cbd
Improves resizeable microcycle test.
2019-06-24 10:55:22 -04:00
Thomas Harte
d27ba90c07
Attempts to introduce more rigour to variable-length instruction handling.
2019-06-24 10:43:28 -04:00
Thomas Harte
db4ca746e3
Introduces BSET tests, fixes BSET timing.
2019-06-23 22:53:37 -04:00
Thomas Harte
d50fbfb506
Imports EXG and PEA tests, and fixes EXG timing.
2019-06-23 22:21:25 -04:00
Thomas Harte
86fdc75feb
Incorporates RTR test, adding a ProcessorState helper.
2019-06-23 18:37:32 -04:00
Thomas Harte
b63231523a
Completes import of ROL tests.
2019-06-23 17:33:12 -04:00
Thomas Harte
70e296674d
Starts import of ROL tests.
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Including time tests, this time.
2019-06-22 22:42:57 -04:00
Thomas Harte
8c8493bc9d
Ensures proper loading of the SP at reset.
2019-06-21 18:20:26 -04:00
Thomas Harte
ccfe1b13cb
Imports DIVS, MULS and MOVE from SR tests.
...
Not all passing.
2019-06-21 16:03:11 -04:00
Thomas Harte
0c1c10bc66
Introduces a test that proves that DIVS' attempt to set proper timing isn't working.
2019-06-20 19:29:02 -04:00
Thomas Harte
fafd1801fe
Introduces first DIVS test, and associated fixes.
2019-06-20 19:02:03 -04:00
Thomas Harte
79d8d27b4c
Reintroduces use of locations_by_bus_step_ to decrease 68000 construction time.
2019-06-20 15:10:11 -04:00
Thomas Harte
440f52c943
Incorporates TRAP test.
2019-06-19 21:18:30 -04:00
Thomas Harte
91ced056d2
Adds tests for ADD. No failures.
2019-06-19 18:56:21 -04:00
Thomas Harte
8dace34e63
Imports third-party tests for ABCD, and thereby fixes ABCD.
2019-06-19 18:13:06 -04:00
Thomas Harte
8182b0363f
Adds enum to help with status decoding.
2019-06-19 17:01:49 -04:00
Thomas Harte
c5b036fedf
Ensures aborted decodes don't overwrite prior correct ones.
2019-06-19 17:00:44 -04:00
Thomas Harte
e26ddd0ed5
Corrects address fetches for CMPI.l #, (xxx).w.
2019-06-19 13:52:56 -04:00
Thomas Harte
ca83431e54
Fixed: Scc is a byte operation.
...
It was, until now, post-incrementing and pre-decrementing registers other than A7 incorrectly.
2019-06-19 13:15:12 -04:00
Thomas Harte
00c32e4b59
Further miscellaneous changes to debug logging. All temporary.
2019-06-18 10:34:31 -04:00
Thomas Harte
877b46d2c1
Advances IWM/drive emulation very close to the point of 'Welcome to Macintosh'.
2019-06-15 16:08:54 -04:00
Thomas Harte
bde975a3b9
Possibly mights the tiniest bit of headway with 'the IWM'.
...
I'm now pretty sure that my 3.5" drive, which for now is implemented in the IWM (yuck) is just responding to queries incorrectly.
2019-06-13 22:38:09 -04:00
Thomas Harte
f6f9024631
Corrects Macintosh aspect ratio (and framing).
2019-06-13 18:41:38 -04:00
Thomas Harte
59a94943aa
Resolves final set of build warnings.
2019-06-13 10:55:29 -04:00
Thomas Harte
bf4889f238
Reduces warnings to 6.
2019-06-13 10:43:00 -04:00
Thomas Harte
7cc5afd798
Eliminates another couple of implicit type conversion warnings.
2019-06-13 10:30:26 -04:00
Thomas Harte
11ab021672
Further reduces implicit conversion warnings, to 17.
2019-06-13 10:27:49 -04:00
Thomas Harte
feafd4bdae
Eliminates further type conversion warnings.
2019-06-13 10:20:17 -04:00
Thomas Harte
d6150645c0
By hook or by crook, mouse input now works.
2019-06-12 22:19:25 -04:00
Thomas Harte
ec5701459c
Makes various temporary logging changes.
2019-06-11 19:54:07 -04:00
Thomas Harte
697e094a4e
Sketches out the absolute basics of an SCC interface.
2019-06-08 18:47:11 -04:00
Thomas Harte
e9d0676e75
Fiddles further with the tachometer.
2019-06-06 21:36:19 -04:00
Thomas Harte
7591906777
Numerous IWM fixes: the machine now seems to be trying to measure the tachometer.
2019-06-06 18:32:11 -04:00
Thomas Harte
058fe3e986
Fixes some other low-hanging warning fruit.
2019-06-04 16:47:10 -04:00
Thomas Harte
51ee83a427
Resolves a further 11 conversion errors.
2019-06-04 16:34:45 -04:00
Thomas Harte
5b21da7874
Reduces number of warnings to 70.
2019-06-04 16:27:09 -04:00
Thomas Harte
bd7f00bd9c
Resolves a further handful of implicit type conversion warnings.
2019-06-04 15:43:44 -04:00
Thomas Harte
4d4ddded6d
Fixes register-relative JMP and JSR.
2019-06-03 15:29:50 -04:00
Thomas Harte
881feb1bd3
Adds preliminary parsing of the Disk Copy 4.2 format.
2019-06-02 13:39:25 -04:00
Thomas Harte
035f07877c
Reduces conversions to vector.
2019-05-30 12:08:35 -04:00
Thomas Harte
b3d2b4cd37
Fixes the interrupt return address.
2019-05-29 20:27:46 -04:00
Thomas Harte
c86fe9ada9
Ensures replace_write_values works in release builds.
2019-05-29 19:00:53 -04:00
Thomas Harte
ecf93b7822
Eliminates some type conversion warnings.
2019-05-29 14:56:50 -04:00
Thomas Harte
541b75ee6e
Further fixes PEA, and OR/AND/EOR Dn, (An).
2019-05-29 14:37:15 -04:00
Thomas Harte
77b08febdb
Corrects PEA and adds an additional debugging aid.
2019-05-29 12:47:17 -04:00
Thomas Harte
fcda376f33
Removes three further type conversion warnings.
2019-05-28 21:56:49 -04:00
Thomas Harte
0848fc7e03
Ensures the Mac uses auto vectored interrupts.
2019-05-28 16:24:41 -04:00
Thomas Harte
3bb8d6717f
Ensures A7 is correct at end of an UNLINK.
2019-05-28 16:02:42 -04:00
Thomas Harte
5e2496d59c
Simplifies and corrects MOVE logic.
2019-05-28 15:17:03 -04:00
Thomas Harte
c52da9d802
Adds some logging preparatory to a MOVE change.
2019-05-28 15:05:42 -04:00
Thomas Harte
0b999ce0e4
Attempts to fix register-relative JSRs.
2019-05-09 06:43:07 -04:00
Thomas Harte
b04bd7069d
Corrects Scc and DBcc (xxx).l and (xxx).w.
2019-05-09 06:28:55 -04:00
