121 Commits

Author	SHA1	Message	Date
Thomas Harte	7be3578497	Adds a target for audio writes.	2021-11-09 07:11:23 -05:00
Thomas Harte	31e22e4cfb	Provides full serial input.	2021-11-07 05:19:16 -08:00
Thomas Harte	c0c2b5e3a9	Post key actions to the nominated serial line. ... Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.	2021-11-06 12:03:09 -07:00
Thomas Harte	c9bf2dda16	Attempt implementation of disk sync.	2021-11-02 18:18:59 -07:00
Thomas Harte	3ceb378b9b	Relocate disk logic into a separate compilation unit.	2021-11-02 17:35:23 -07:00
Thomas Harte	1cf1c90511	Adds support for interlaced output.	2021-11-02 14:34:03 -07:00
Thomas Harte	d989825216	Add bonus notes on VPOSR.	2021-11-02 03:47:39 -07:00
Thomas Harte	3976420b88	Retains a little more of output controls.	2021-11-01 17:15:36 -07:00
Thomas Harte	2f1ce5fe43	Switch to using the swizzled palette for playfield output.	2021-11-01 14:44:30 -07:00
Thomas Harte	42145a5b8a	Delay bitplane installation until end of slot.	2021-11-01 14:18:58 -07:00
Thomas Harte	4e66017205	Enable sprite reuse and toggle to inactive when visible region is over.	2021-10-31 16:52:48 -07:00
Thomas Harte	4c1ab6ff25	Rethinks bitplane stops.	2021-10-31 09:01:38 -07:00
Thomas Harte	02c88e6826	VHPOSR's fields are the other way around.	2021-10-30 12:04:46 -07:00
Thomas Harte	d25804f4a2	Throws in official register names.	2021-10-29 14:05:11 -07:00
Thomas Harte	edb75e69cb	Implement bitplane modulos.	2021-10-29 11:29:22 -07:00
Thomas Harte	b952d73e83	Disallow programmatic setting of blitter status.	2021-10-29 06:19:57 -07:00
Thomas Harte	da1a69be27	Caps mouse speed. ... Also takes another guess at CIA interrupt bits. To no avail.	2021-10-27 18:38:02 -07:00
Thomas Harte	139d35c6f9	Switches to basic use of sprite shifters.	2021-10-25 20:58:48 -07:00
Thomas Harte	cb24457b4a	Starts on a two-at-a-time sprite shifter.	2021-10-25 16:30:30 -07:00
Thomas Harte	9f3efb7f05	Limits graphical output to [all but one bit] of the display window.	2021-10-25 14:12:23 -07:00
Thomas Harte	e6001e0f22	Shifts bitplanes irrespective of output window.	2021-10-25 13:59:39 -07:00
Thomas Harte	c6535bf035	Switches bitplane shifter to returning four high-res pixels at a time.	2021-10-25 13:34:36 -07:00
Thomas Harte	7118a515e0	Reduce logging in trustworthy areas.	2021-10-23 20:36:41 -07:00
Thomas Harte	952451c9b8	Add mouse input.	2021-10-23 20:17:13 -07:00
Thomas Harte	610327a04e	Fix sprite H start bit order.	2021-10-22 23:20:20 -07:00
Thomas Harte	2121e32409	Fix sprite bit ordering.	2021-10-22 21:10:01 -07:00
Thomas Harte	7ec21edc2f	Attempts to hack in some form of sprite display.	2021-10-22 19:51:10 -07:00
Thomas Harte	003162f710	Limit to specific purpose.	2021-10-22 16:16:19 -07:00
Thomas Harte	040ac93042	Takes a shot at the vertical stuff of sprite DMA.	2021-10-22 14:32:59 -07:00
Thomas Harte	b489ba3d0d	Adds sprite DMA windows.	2021-10-22 13:07:20 -07:00
Thomas Harte	c5e8b547af	Captures the attach flag and observes activation rule.	2021-10-22 11:21:58 -07:00
Thomas Harte	e67de90ad0	Starts to bring sprites inside DMADevice orthodoxy.	2021-10-21 21:57:46 -07:00
Thomas Harte	c3c84c88a1	Switch to ahead-of-time planar to chunky conversion.	2021-10-21 20:48:57 -07:00
Thomas Harte	0dc9c4cee1	Undo hard-coding of fetch window.	2021-10-19 15:18:39 -07:00
Thomas Harte	b312a61a81	Add two dummy reads.	2021-10-16 13:30:45 -07:00
Thomas Harte	e27a10bde4	Simplify control flow.	2021-10-14 16:47:18 -07:00
Thomas Harte	253a199f27	Fire sync-match interrupt upon any match.	2021-10-14 16:36:17 -07:00
Thomas Harte	b12c640807	Makes drives non-copyable. ... To avoid error in the future.	2021-10-14 12:37:55 -07:00
Thomas Harte	9be23ecc34	Add end-of-Blit interrupt. ... Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.	2021-10-13 15:09:19 -07:00
Thomas Harte	eec068914e	Slightly improve logging.	2021-10-11 18:05:57 -07:00
Thomas Harte	39b8285ba5	Trust the HRM on step bit, but catch rising edge.	2021-10-11 07:42:42 -07:00
Thomas Harte	7733fef3bd	DSKLEN has to be written twice.	2021-10-11 06:16:01 -07:00
Thomas Harte	6acddfdb98	Add the sync match interrupt. ... Albeit that it doesn't yet unblock disk DMA.	2021-10-11 03:37:56 -07:00
Thomas Harte	99492c2ec2	Further tweak logging.	2021-10-10 18:19:50 -07:00
Thomas Harte	846b505d27	Reduce logging; disk data probably isn't the immediate obstacle.	2021-10-10 13:04:10 -07:00
Thomas Harte	8d43b4a98d	Expands Disk DMA access window.	2021-10-10 11:47:02 -07:00
Thomas Harte	9336ffe216	Take a stab at index-hole sync.	2021-10-09 08:01:02 -07:00
Thomas Harte	eb157f15f3	Adds index hole interrupt.	2021-10-09 04:08:59 -07:00
Thomas Harte	d6e2a3f425	Make a first attempt to spool into RAM.	2021-10-08 18:11:47 -07:00
Thomas Harte	b47ca13ed3	Push disk data onwards.	2021-10-08 17:18:11 -07:00