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11,339 Commits 10 Branches 118 Tags 495 MiB
99f0233b76
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842 Commits

Author SHA1 Message Date
Thomas Harte
99f0233b76 Fix immediate offset and data processing operation. 2024-03-02 23:27:37 -05:00
Thomas Harte
62da0dee7f Unify reads. 2024-03-02 23:15:17 -05:00
Thomas Harte
1663d3d9d1 Introduce disaster of an attempted test run. 2024-03-02 22:40:12 -05:00
Thomas Harte
37499d493a Fix model name. 2024-03-02 21:47:09 -05:00
Thomas Harte
e6f77a9b80 Add logical right-shift tests. 2024-03-01 18:06:54 -05:00
Thomas Harte
42ba6d1281 Relocate execution code appropriately. 2024-03-01 15:02:47 -05:00
Thomas Harte
5759798ad7 Deal with downward write order. 2024-02-29 14:34:20 -05:00
Thomas Harte
fd2c5b6679 Make a quick first attempt at memory accesses. 2024-02-29 10:18:09 -05:00
Thomas Harte
93b4008f81 Localise flags, detect improper carry write. 2024-02-28 21:28:19 -05:00
Thomas Harte
904462b881 Regularise data transfers. 2024-02-28 21:23:57 -05:00
Thomas Harte
3b320bcdef Update coprocessor interface. 2024-02-28 14:43:31 -05:00
Thomas Harte
3368bdb99f Document exceptions, partly for my future self. 2024-02-28 14:34:31 -05:00
Thomas Harte
4d400c3cb7 Add easy exceptions. 2024-02-28 14:25:12 -05:00
Thomas Harte
474f9da3c2 Add banked registers. 2024-02-28 14:09:05 -05:00
Thomas Harte
c49b26701f Relocate and clarify barrel shifts. 
With a view to independent testing.
 2024-02-28 13:53:13 -05:00
Thomas Harte
9b42d35d56 Update interface. 2024-02-28 11:42:33 -05:00
Thomas Harte
645152a1fd Implement branch. 2024-02-28 11:33:28 -05:00
Thomas Harte
487ade56ed Add basic multiply. 2024-02-28 11:27:27 -05:00
Thomas Harte
60d1b36e9a Implement registers side. 2024-02-28 10:25:14 -05:00
Thomas Harte
5a48c15e46 Add scheduler side of PC writeback. 2024-02-28 10:15:23 -05:00
Thomas Harte
d6bf1808f9 Take a swing at PC-as-input. 2024-02-28 09:33:05 -05:00
Thomas Harte
b676153d21 State intention to merge status with other registers. 2024-02-27 15:36:34 -05:00
Thomas Harte
a3339cf882 Fix indentation. 2024-02-27 15:30:51 -05:00
Thomas Harte
4255283e33 Deal with conditionality up front. 2024-02-26 21:36:23 -05:00
Thomas Harte
16e827bb2c Add basic arithmetics. 2024-02-26 21:27:58 -05:00
Thomas Harte
580f402bb6 Muddle further towards data processing. 2024-02-26 14:50:45 -05:00
Thomas Harte
030dda34f0 Start poking at implementation. 2024-02-26 14:30:26 -05:00
Thomas Harte
481b6d0e69 Sketch out some status flags. 2024-02-25 22:01:51 -05:00
Thomas Harte
a88d41bf00 List the flags. 2024-02-25 15:21:54 -05:00
Thomas Harte
73d2acca12 Moderately improve comments. 2024-02-22 11:20:22 -05:00
Thomas Harte
d205e538e1 Accept the C++ I'm in; clarify and simplify interface. 2024-02-22 10:16:54 -05:00
Thomas Harte
6577f68efc Complete instruction set; consolidate mapper. 2024-02-21 15:32:27 -05:00
Thomas Harte
e986ae2878 Add coprocessor data operations and register transfers. 2024-02-21 15:25:57 -05:00
Thomas Harte
b2696450d5 Bring forwards single data transfers. 2024-02-21 14:51:51 -05:00
Thomas Harte
2bbaf73aa2 Delete was is now duplicated. 2024-02-21 14:18:41 -05:00
Thomas Harte
0fe2c1406b Start mutating towards a form that owns the switch. 2024-02-21 14:17:01 -05:00
Thomas Harte
954d920b9e Extend what's held in the operation enum. 2024-02-20 14:14:18 -05:00
Thomas Harte
57b45076c5 Start dealing with per-instruction fields. 2024-02-17 22:13:51 -05:00
Thomas Harte
d639dc8bcb Hit up some more = default opportunities. 2024-02-17 15:42:31 -05:00
Thomas Harte
9a74ab6a8e Switch to actual mnenomics, temporarily(?) shrink table. 2024-02-17 15:41:57 -05:00
Thomas Harte
4c53414cc3 Merge branch 'master' into ARMDecoding 2024-02-17 08:14:18 -05:00
Thomas Harte
bc5727af14 Switch to = default. 2024-02-16 21:50:15 -05:00
Thomas Harte
bd0a15c054 Start working on ARM2 decoding. 2024-02-16 21:36:07 -05:00
Ryan Carsten Schmidt
d811501421 Compatibility fixes in Markdown files. 
Improve compatibility with some Markdown readers like MacDown by adding
blank lines before lists. Blank lines around headers were added for
consistency. One header level was fixed. One code block was fixed.
 2024-01-27 13:24:35 -06:00
Thomas Harte
b61317ba7e Continue conversion of logging. 2024-01-19 22:02:26 -05:00
Thomas Harte
a3d37640aa Switch include guards to #pragma once. 2024-01-16 23:34:46 -05:00
Thomas Harte
795529ef97 Resolve sizing types. 2023-12-24 14:26:15 -05:00
Thomas Harte
cbd4f7965b Acknowledge one further 16-bit assumption. 2023-12-24 14:22:26 -05:00
Thomas Harte
13631fb7bc Resolve various 32->16 conversion warnings. 2023-12-24 14:14:53 -05:00
Thomas Harte
3e328bed61 Be overt about jump size, albeit without internal rigour. 2023-12-24 14:11:41 -05:00