Thomas Harte
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d674fd0e67
|
The WD uses only the low two bits for sector size.
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2020-01-18 13:40:50 -05:00 |
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Thomas Harte
|
aac3d27c10
|
Adds activity indicators for the BD-500 and Jasmin.
Also slightly cleans up DiskController a little further.
|
2020-01-15 23:39:15 -05:00 |
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Thomas Harte
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2d233b6358
|
Makes a more concrete attempt at track/sector combination.
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2020-01-12 22:18:31 -05:00 |
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Thomas Harte
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6a44936a7c
|
Ensures programmatic volume level 0 is completely off.
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2020-01-05 22:44:52 -05:00 |
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Thomas Harte
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c1bae49a92
|
Standardises on read and write for bus accesses.
Logic being: name these things for the bus action they model, not the effect they have.
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2020-01-05 13:40:02 -05:00 |
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Thomas Harte
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153f60735d
|
Banishes redefined macro warning.
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2020-01-01 12:38:30 -05:00 |
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Thomas Harte
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e59de71d79
|
Disables status logging, at least until next needed.
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2019-12-24 21:44:50 -05:00 |
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Thomas Harte
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4205e95883
|
Switches to capture of the track 0 flag during a type 1 operation.
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2019-12-24 21:43:20 -05:00 |
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Thomas Harte
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dfa6b11737
|
Adds responsibility for an ongoing index pulse to the drive.
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2019-12-24 20:53:37 -05:00 |
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Thomas Harte
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42926e72cc
|
Adjusted: Flag::WriteProtect works in real time for a type-1 status.
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2019-12-24 19:57:12 -05:00 |
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Thomas Harte
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80cb06eb33
|
It provisionally seems as though spin_up should be reset by a force interrupt?
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2019-12-24 19:37:37 -05:00 |
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Thomas Harte
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0dae608da5
|
Embraces std::make_[unique/shared] in place of .reset(new .
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2019-12-23 21:31:46 -05:00 |
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Thomas Harte
|
ac604b30f3
|
Eliminates dangling static_cast s in favour of construction.
|
2019-12-22 20:59:20 -05:00 |
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Thomas Harte
|
b035b92f33
|
Corrects accidental use of sector contents as addresses in multi-sector reads and writes.
As a secondary defect, this was also causing erroneous CRC error reports.
|
2019-12-22 19:58:02 -05:00 |
|
Thomas Harte
|
d25b48878c
|
Cleans up READ_ID macro, inter alia.
|
2019-12-22 17:58:33 -05:00 |
|
Thomas Harte
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274867579b
|
Deploys constexpr as a stricter const .
|
2019-12-22 00:22:17 -05:00 |
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Thomas Harte
|
a847654ef2
|
Corrects various old-fashioned bits of indentation, plus the odd const.
|
2019-12-22 00:00:23 -05:00 |
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Thomas Harte
|
57ce10418f
|
Switches prescale logic, the better to deal with changes in prescaler.
According to my assumptions about the behaviour, anyway.
|
2019-12-20 23:33:14 -05:00 |
|
Thomas Harte
|
2a1520c04e
|
Removes mostly-uninformative piece of logging.
|
2019-12-19 22:58:28 -05:00 |
|
Thomas Harte
|
206ab380c7
|
Introduces double-resolution envelopes for the Atari ST.
|
2019-12-18 22:03:02 -05:00 |
|
Thomas Harte
|
d85ae21b2f
|
Adds an explicit declaration of chip type to all AY users.
|
2019-12-18 19:28:41 -05:00 |
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Thomas Harte
|
c2646a415f
|
Switch to faster timer implementation; it seems to work.
|
2019-12-09 19:23:08 -05:00 |
|
Thomas Harte
|
7cd11ecb7f
|
Adds necessary #include for assert .
|
2019-12-08 22:43:39 -05:00 |
|
Thomas Harte
|
acfe2c63b8
|
Adds an assert to verify the interrupt line is clear after a full reset.
|
2019-12-08 22:34:19 -05:00 |
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Thomas Harte
|
b192381928
|
Implements a fuller reset, takes a run at the overran flag.
|
2019-12-08 21:20:06 -05:00 |
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Thomas Harte
|
7ff57f8cdf
|
Starts to flesh out documentation.
|
2019-11-19 22:32:07 -05:00 |
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Thomas Harte
|
06edeea866
|
Adds reload during event count mode.
Plus a helpful bit of TODO.
|
2019-11-19 22:24:32 -05:00 |
|
Thomas Harte
|
e0ceab6642
|
Pivots towards looking at Timer B as a cause of in-frame inaccuracy.
|
2019-11-19 21:52:50 -05:00 |
|
Thomas Harte
|
0ce5057fd9
|
Attempts to factor in event counting direction.
|
2019-11-18 22:37:20 -05:00 |
|
Thomas Harte
|
6ec3c47cc0
|
Ensures same-level interrupts don't double trigger.
|
2019-11-12 22:18:13 -05:00 |
|
Thomas Harte
|
d6edfa5c6d
|
Removes the redundant state encased within interrupt_causes_.
|
2019-11-11 21:49:02 -05:00 |
|
Thomas Harte
|
072b0266af
|
It seems status reads are not required to clear the interrupt line.
|
2019-11-09 20:12:09 -05:00 |
|
Thomas Harte
|
5fc4e57db7
|
Eliminates non-portable use of fls .
|
2019-11-09 16:03:00 -05:00 |
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Thomas Harte
|
e3abbc9966
|
Renames what didn't end up being a whole SerialPort.
|
2019-11-09 15:21:51 -05:00 |
|
Thomas Harte
|
8c736a639a
|
Eliminates unexpected bottleneck created by ACIA.
|
2019-11-09 15:00:12 -05:00 |
|
Thomas Harte
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14e790746b
|
Fixes return value when reading received data.
|
2019-11-02 21:25:00 -04:00 |
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Thomas Harte
|
75e34b4215
|
Reacts to no acknowledgement.
|
2019-10-31 21:00:05 -04:00 |
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Thomas Harte
|
a5bbf54a27
|
Adds the ability for the 68901 to decline an interrupt acknowledgement.
|
2019-10-31 19:57:36 -04:00 |
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Thomas Harte
|
731dc350b4
|
Adds sometime real-time clocking for DMA.
|
2019-10-30 22:59:32 -04:00 |
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Thomas Harte
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635e18a50d
|
Ensures the MFP requests and receives real-time clocking when needed.
|
2019-10-30 22:42:06 -04:00 |
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Thomas Harte
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4857ceb3eb
|
Attempts to get a bit more systematic.
Spotted that interrupt_enable_ isn't being used properly while doing so, hopefully that's now correct.
|
2019-10-29 23:16:08 -04:00 |
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Thomas Harte
|
1c154131f9
|
Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.
|
2019-10-29 22:36:29 -04:00 |
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Thomas Harte
|
fd02b6fc18
|
Corrects in-service test; adds pending clearing upon enabled clearing.
|
2019-10-28 22:51:00 -04:00 |
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Thomas Harte
|
553f3b6d8b
|
Properly conforms to GPIP input/output blending.
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2019-10-28 22:37:11 -04:00 |
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Thomas Harte
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a5057e6540
|
Ensures that stop means stop.
|
2019-10-28 22:12:45 -04:00 |
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Thomas Harte
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aa52652027
|
Adds a const.
|
2019-10-28 21:21:35 -04:00 |
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Thomas Harte
|
5f6711b72c
|
Ensures interrupt changes are notified to the delegate.
|
2019-10-28 21:13:06 -04:00 |
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Thomas Harte
|
de1bfb4e24
|
Stores and returns timer configuration.
|
2019-10-27 22:38:49 -04:00 |
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Thomas Harte
|
0082dc4411
|
Improves logging.
|
2019-10-27 00:02:55 -04:00 |
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Thomas Harte
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22754683f8
|
Ensures timer divisor values don't go out of range, adds timer interrupts.
I suspect further timer issues remain.
|
2019-10-26 23:20:13 -04:00 |
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Thomas Harte
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e89be6249d
|
Adds a logging prefix.
|
2019-10-26 22:38:56 -04:00 |
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Thomas Harte
|
e96386f572
|
Takes another stab at MFP interrupt management.
|
2019-10-26 15:55:19 -04:00 |
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Thomas Harte
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a8d481a764
|
Writes to the pending register appear to be able to clear interrupts too.
|
2019-10-25 22:46:30 -04:00 |
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Thomas Harte
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872897029e
|
Attempts a complete wiring of 68901 interrupts.
|
2019-10-25 22:36:01 -04:00 |
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Thomas Harte
|
7a2de47f58
|
Corrects interrupt mask generation.
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2019-10-24 22:37:32 -04:00 |
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Thomas Harte
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f2f98ed60c
|
Attempts some part of interrupt decision making.
|
2019-10-24 22:33:42 -04:00 |
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Thomas Harte
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77f14fa638
|
Starts trying to make sense of interrupts.
|
2019-10-23 23:09:49 -04:00 |
|
Thomas Harte
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f09a240e6c
|
Gives myself more trace details.
|
2019-10-21 23:20:03 -04:00 |
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Thomas Harte
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e30ba58e0d
|
Attempts to wire ACIA interrupt signals into the MFP.
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2019-10-21 23:02:30 -04:00 |
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Thomas Harte
|
7cb82fccc0
|
Attempts properly to maintain interrupt flag; adds delegate.
|
2019-10-21 22:40:38 -04:00 |
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Thomas Harte
|
ed9a5b0430
|
Adds receipt interrupt.
|
2019-10-21 21:27:57 -04:00 |
|
Thomas Harte
|
8f59a73425
|
Corrects incoming data capture.
|
2019-10-21 20:18:52 -04:00 |
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Thomas Harte
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91223b9ec8
|
Sets default level to high.
|
2019-10-21 20:18:33 -04:00 |
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Thomas Harte
|
83f5f0e2ad
|
Begins trying to receive ACIA data.
|
2019-10-21 20:10:19 -04:00 |
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Thomas Harte
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cf37e9f5de
|
Remove source control markers.
|
2019-10-20 23:40:51 -04:00 |
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Thomas Harte
|
e4f7ead894
|
Merge branch 'AtariST' of github.com:TomHarte/CLK into AtariST
|
2019-10-20 23:40:01 -04:00 |
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Thomas Harte
|
4134463094
|
The ACIA now receives bits.
|
2019-10-20 23:34:30 -04:00 |
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Thomas Harte
|
83d73fb088
|
The keyboard now responds to a reset on its serial line.
|
2019-10-20 23:13:44 -04:00 |
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Thomas Harte
|
cf07982a9b
|
Ensures good serial line and ACIA behaviour.
Next stop: having the intelligent keyboard react.
|
2019-10-20 22:10:05 -04:00 |
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Thomas Harte
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2e86dada1d
|
Ensures updates even when the event queue is empty.
|
2019-10-20 20:38:56 -04:00 |
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Thomas Harte
|
696af5c3a6
|
Starts to transfer serial line decoding logic into the line itself.
|
2019-10-20 20:38:56 -04:00 |
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Thomas Harte
|
f08b38d0ae
|
Silences, temporarily.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
9a8352282d
|
Mostly but not quite fixes serial work.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
3d03cce6b1
|
Starts working on the GPIP functionality block.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
34075a7674
|
Attempts to tie an intelligent keyboard to the other end of its serial line.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
f79c87659f
|
Corrects documentation error.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
c10b64e1c0
|
Adds a received_data_ register, that presently can never fill.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
5d5fe52144
|
Corrects transmission logic — exactly hitting write_data_time_remaining now works properly.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
d461331fd2
|
Ensures remaining_delays_ is set properly after [reset/flush]_writing.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
ff62eb6dce
|
The ACIA actually has two clocks, though on an ST they're both 500,000 Hz.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
374439693e
|
Ensures serial lines know their writer's clock rate.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
c4ef33b23f
|
JustInTimeActors can now specify a clock divider.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
a7ed357569
|
Attempts to implement transmission interrupts and ClockingHint::Source.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
4e5b440145
|
Attempts mostly to implement 6850 output.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
2bd7be13b5
|
Decodes the 6850 control register, and starts working on standardised serial ports.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
4b09d7c41d
|
Nudges 6850 towards coherence.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
b0f5f7bd37
|
Attempts to start producing actual video.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
4ead905c3c
|
Adds an empty shell for the ACIA.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
127bb043e7
|
Adds enough logic to advance to an ACIA access error.
|
2019-10-20 20:38:55 -04:00 |
|
Thomas Harte
|
2cf52fb89c
|
Makes an unsuccessful first attempt at some timer functionality.
|
2019-10-20 20:38:54 -04:00 |
|
Thomas Harte
|
6e1b606adf
|
Adds a target for MFP read/write operations.
Completely without any implementation, so far.
|
2019-10-20 20:38:54 -04:00 |
|
Thomas Harte
|
e095a622d3
|
Ensures updates even when the event queue is empty.
|
2019-10-17 23:59:43 -04:00 |
|
Thomas Harte
|
9ab49065cd
|
Starts to transfer serial line decoding logic into the line itself.
|
2019-10-17 23:34:39 -04:00 |
|
Thomas Harte
|
ab50f17d87
|
Silences, temporarily.
|
2019-10-16 23:34:49 -04:00 |
|
Thomas Harte
|
f5a2e180f9
|
Mostly but not quite fixes serial work.
|
2019-10-16 23:34:37 -04:00 |
|
Thomas Harte
|
f2e1584275
|
Starts working on the GPIP functionality block.
|
2019-10-16 23:21:25 -04:00 |
|
Thomas Harte
|
0fd8813ddb
|
Attempts to tie an intelligent keyboard to the other end of its serial line.
|
2019-10-16 23:21:14 -04:00 |
|
Thomas Harte
|
b69180ba01
|
Corrects documentation error.
|
2019-10-16 23:19:42 -04:00 |
|
Thomas Harte
|
c352d8ae8c
|
Adds a received_data_ register, that presently can never fill.
|
2019-10-13 23:04:57 -04:00 |
|
Thomas Harte
|
530e831064
|
Corrects transmission logic — exactly hitting write_data_time_remaining now works properly.
|
2019-10-13 21:40:46 -04:00 |
|