2884 Commits

Author	SHA1	Message	Date
Thomas Harte	f89ca84902	Add missing include.	2022-08-22 21:44:33 -04:00
Thomas Harte	246bd5a6ac	Merge branch 'master' into AppleIISCSI	2022-08-22 17:09:57 -04:00
Thomas Harte	3c2d01451a	Remove dead comment.	2022-08-22 17:01:52 -04:00
Thomas Harte	c2c81162a1	Sketch out some of the easy stuff.	2022-08-22 16:48:51 -04:00
Thomas Harte	3d234147a6	Add in collected specs.	2022-08-22 10:22:19 -04:00
Thomas Harte	8e7f53751d	Add Apple II SCSI ROM to the catalogue.	2022-08-21 22:03:52 -04:00
Thomas Harte	bfc77f1606	Add workaround that further isolates whatever bug Spindizzy reveals.	2022-08-19 16:38:42 -04:00
Thomas Harte	a6b8285d9c	Factor out the blitter sequencer.	2022-08-19 16:38:15 -04:00
Thomas Harte	837acdcf60	Experimentally decline immediate blits.	2022-08-16 21:51:13 -04:00
Thomas Harte	7289192130	Fix refresh slots: they're taken, not open.	2022-08-16 21:51:02 -04:00
Thomas Harte	bb54ac14b8	Prove that new output errors are [probably] external to the Blitter.	2022-08-15 11:10:17 -04:00
Thomas Harte	856e3d97bf	Merge branch 'master' into SerialisedBlitter	2022-08-15 10:54:36 -04:00
Thomas Harte	94231ca3e3	Put word-sizing responsibility on the caller.	2022-08-10 16:41:45 -04:00
Thomas Harte	e2a8b26b57	Display properly from greater RAM sizes.	2022-08-10 16:36:11 -04:00
Thomas Harte	6d1c954623	Make ST RAM size selectable, default to 1MB.	2022-08-10 12:00:06 -04:00
Thomas Harte	bdb35b6191	Add an easier hook for debugging.	2022-08-08 21:00:28 -04:00
Thomas Harte	892580c183	Clarify test.	2022-08-08 15:57:36 -04:00
Thomas Harte	d4b7d73fc4	Further reduces lines to one access per slot, max.	2022-08-07 19:19:00 -04:00
Thomas Harte	867769f6e7	Reduces line drawing to two accesses per slot. ... Still a fiction, but a better one.	2022-08-07 19:15:03 -04:00
Thomas Harte	3781b5eb0e	Provide further context.	2022-08-06 14:40:12 -04:00
Thomas Harte	318cea4ccd	Attempt a full bus-transaction comparison.	2022-08-06 10:06:49 -04:00
Thomas Harte	45892f3584	Add optional transaction records to the Blitter.	2022-08-06 09:51:20 -04:00
Thomas Harte	612413cb1c	Remove redundant state.	2022-08-04 10:06:14 -04:00
Thomas Harte	511ec5a736	Apply modulos at end of final line. ... Possibly I need to rethink the sequence logic?	2022-07-30 21:35:26 -04:00
Thomas Harte	4fb9dec381	Fix use of bool.	2022-07-30 21:02:44 -04:00
Thomas Harte	82476bdabe	Avoid 'complete' repetition.	2022-07-30 21:02:04 -04:00
Thomas Harte	58ee8e2460	Minor tidy-up. No fixes.	2022-07-30 21:00:50 -04:00
Thomas Harte	94a90b7a89	Attempt a real slot-by-slot blit.	2022-07-30 20:34:37 -04:00
Thomas Harte	5d992758f8	Ensure blitter with all flags disabled terminates.	2022-07-30 20:13:37 -04:00
Thomas Harte	27b8c29096	Apply modulos at end of line, not beginning.	2022-07-30 10:27:53 -04:00
Thomas Harte	93d2a612ee	Add an explicit flush-pipeline step; some tests now pass.	2022-07-29 16:33:46 -04:00
Thomas Harte	03d4960a03	Begin a full-synchronous usage of the sequencer, at least exposing poor handling of the pipeline.	2022-07-29 16:15:18 -04:00
Thomas Harte	1ac0a4e924	Provide a loop count directly from the sequencer. ... This avoids the caller having to take a guess at iterations.	2022-07-29 12:14:59 -04:00
Thomas Harte	d85d70a133	Add documentation, formal begin function.	2022-07-26 22:01:43 -04:00
Thomas Harte	2c95dea4db	Introduce putative blitter sequencer.	2022-07-26 17:05:05 -04:00
Thomas Harte	804c12034c	Apply blitter priority bit.	2022-07-26 16:07:26 -04:00
Thomas Harte	ce7f57f251	Switch to regular integer types for flags.	2022-07-26 09:22:05 -04:00
Thomas Harte	426eb0f79b	Add comments, fix playfield sprite masking.	2022-07-22 17:01:38 -04:00
Thomas Harte	6beca141d5	Reinstate assumption of no sprites in vertical blank.	2022-07-21 08:41:50 -04:00
Thomas Harte	f29d305597	Add missing #include.	2022-07-19 21:40:16 -04:00
Thomas Harte	89abf7faeb	Take a guess at reintroducing a special case for end-of-blank.	2022-07-19 21:25:34 -04:00
Thomas Harte	57186c3c14	Don't limit sprite fetch area; add further commentary.	2022-07-19 16:37:13 -04:00
Thomas Harte	feee6afe0f	Improve documentation.	2022-07-19 16:19:19 -04:00
Thomas Harte	cb42ee3ade	Eliminate DMAState; it sounds like VSTOP solves this problem.	2022-07-19 16:11:29 -04:00
Thomas Harte	830704b4a9	Clarify and slightly improve state machine. ... No more using the visible flag to permit a DMA control fetch.	2022-07-19 15:39:57 -04:00
Thomas Harte	8f2e94a1d8	Switch name back to emphasise _async_.	2022-07-16 14:41:04 -04:00
Thomas Harte	76d5e53094	Fix red/blue confusion.	2022-07-15 16:24:07 -04:00
Thomas Harte	f465fe65f4	Merge pull request #1061 from TomHarte/MacintoshPixels ... Microtweak: simplify Macintosh pixel serialisation.	2022-07-14 18:54:10 -04:00
Thomas Harte	bf03bda314	Generalise AsyncTaskQueue, DeferringAsyncTaskQueue and AsyncUpdater into a single template.	2022-07-14 16:39:26 -04:00
Thomas Harte	59da143e6a	Add overt flushes to the SDL target.	2022-07-12 10:57:22 -04:00
Thomas Harte	4e9ae65459	Reintroduce sync matching.	2022-07-12 09:56:13 -04:00
Thomas Harte	6dabdaca45	Switch to int; attempt to do a better job of initial audio filling.	2022-07-09 13:33:46 -04:00
Thomas Harte	b097b1296b	Adopt granular flushing widely.	2022-07-08 16:04:32 -04:00
Thomas Harte	b03d91d5dd	Permit granular specification of what to flush.	2022-07-08 15:38:29 -04:00
Thomas Harte	96189bde4b	Loop the Master System into the experiment.	2022-07-07 16:46:08 -04:00
Thomas Harte	fc0dc4e5e2	Amiga only, temporarily: attempt to reduce audio maintenance costs.	2022-07-07 16:41:49 -04:00
Thomas Harte	7cbee172b2	Merge pull request #1041 from TomHarte/InST ... Switch the Atari ST to the newer 68000.	2022-06-30 17:15:04 -04:00
Thomas Harte	6a2d4ae11d	Merge branch 'master' into InAmiga	2022-06-30 10:12:32 -04:00
Thomas Harte	6da634b79f	Merge branch 'master' into InST	2022-06-30 10:12:23 -04:00
Thomas Harte	924de35cf3	Go all in on support for physical shadowing.	2022-06-29 14:39:56 -04:00
Thomas Harte	7cf9e08948	Map shadowing by logical address, not physical. ... Disclaimer: although this better matches the tests, I've yet to verify.	2022-06-29 06:10:15 -04:00
Thomas Harte	60d3519993	Clarify, attempt to implement as internally documented.	2022-06-28 22:32:31 -04:00
Thomas Harte	6abc317986	Avoid permitting writes in the Cx00 region after uninhibiting the language card.	2022-06-28 16:35:47 -04:00
Thomas Harte	94fcc90886	Use auxiliary switches to control language card area when card is inhibited.	2022-06-28 12:46:31 -04:00
Thomas Harte	7aeaa4a485	Tweak paging semantics, to allow simple multiple dependencies.	2022-06-27 21:38:45 -04:00
Thomas Harte	ef40a81be2	Remove temporary hack.	2022-06-27 08:00:29 -04:00
Thomas Harte	21842052cf	Alternative zero page should affect bank 0's language card area when the card is disabled.	2022-06-27 07:56:45 -04:00
Thomas Harte	56aa182fb6	Fix debug builds.	2022-06-06 15:26:15 -04:00
Thomas Harte	9818c7e78c	Switch the Amiga to the newer 68000.	2022-06-06 11:10:56 -04:00
Thomas Harte	5495f30329	Microtweak: simplify Macintosh pixel serialisation.	2022-06-06 08:34:58 -04:00
Thomas Harte	6aa599a17c	Future-proof perform_bus_operation.	2022-06-06 08:20:16 -04:00
Thomas Harte	57858b2fa5	Merge branch 'master' into InST	2022-06-05 20:59:48 -04:00
Thomas Harte	403eda7024	Add missing flush.	2022-06-05 09:08:36 -04:00
Thomas Harte	1671827d24	Add flush.	2022-06-05 09:07:43 -04:00
Thomas Harte	4a740fbd14	Switch Atari ST to using the new 68000.	2022-06-04 08:43:43 -04:00
Thomas Harte	a61f7e38b6	Very minor: avoid division and modulus when unnecessary.	2022-06-03 15:39:29 -04:00
Thomas Harte	3d059cb751	Make use of Microcycle helpers where relevant. ... None of these existed when the Macintosh was first added to this emulator.	2022-06-03 15:33:31 -04:00
Thomas Harte	1365fca161	Avoid phoney write modifies.	2022-05-27 21:42:55 -04:00
Thomas Harte	a611a745e7	Switch the Macintosh to 68000 mk2.	2022-05-24 12:35:36 -04:00
Thomas Harte	b0518040b5	Plants the seek of a 68000 mark 2.	2022-05-16 11:44:16 -04:00
Thomas Harte	866b6c6129	Eliminate off_t.	2022-04-27 19:16:37 -04:00
Thomas Harte	efff91ea3d	Undo bad guess at initial switch state.	2022-04-17 17:03:05 -04:00
Thomas Harte	290dd3993b	CPC: ensure 64/128k RAM is properly selected.	2022-03-26 08:54:07 -04:00
Thomas Harte	bfd28a04ba	Remove noise.	2022-03-18 10:41:20 -04:00
Thomas Harte	359ec257c0	Add a further state, seemingly to fix high-res mode.	2022-03-18 08:27:46 -04:00
Thomas Harte	88767e402c	Switch DDFSTART/STOP state machine.	2022-03-17 20:03:36 -04:00
Thomas Harte	e698cbf092	Silence debugging information.	2022-03-13 12:48:05 -04:00
Thomas Harte	f2ce646d8d	Undo 8-cycle-if-met WAIT.	2022-03-13 12:47:48 -04:00
Thomas Harte	acba357df6	Adds empty callouts for all serial port registers.	2021-12-23 15:22:20 -05:00
Thomas Harte	a17c192a9e	Allow chip RAM size selection, while I'm here.	2021-12-22 15:30:19 -05:00
Thomas Harte	1916a9b99c	Remove stdout noise.	2021-12-22 15:22:28 -05:00
Thomas Harte	9796b308dc	Add basic implementation of fast RAM.	2021-12-22 15:17:11 -05:00
Thomas Harte	d0e3024bec	Switch to nibble-oriented lookup tables for fill mode.	2021-12-19 17:16:46 -05:00
Thomas Harte	d2ad149e56	Fill mode always runs right to left.	2021-12-19 16:43:18 -05:00
Thomas Harte	348840a2aa	It's probably a net detriment to use a template in this scenario.	2021-12-19 16:31:44 -05:00
Thomas Harte	3a719633eb	Consolidate interface; correct LOGs.	2021-12-18 19:39:41 -05:00
Thomas Harte	bd69948d37	The Copper can now skip Chipset::perform.	2021-12-18 17:53:11 -05:00
Thomas Harte	54aa211f56	Avoid infinite loops for completely undefined addresses.	2021-12-18 17:48:45 -05:00
Thomas Harte	f118891970	Breaks Chipset::perform into read and write. ... This allows each to call the other when a read occurs of a write-only address, and vice versa.	2021-12-18 17:43:53 -05:00
Thomas Harte	dbae3fc9a5	Propagate to bitplanes immediately; fix odd/even confusion.	2021-12-18 16:37:40 -05:00