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Author	SHA1	Message	Date
Thomas Harte	9abd653fb9	Avoid impossible clamps.	2024-09-21 21:25:49 -04:00
Thomas Harte	ff6753fcdf	PEI: don't page wrap.	2024-09-21 21:12:04 -04:00
Thomas Harte	a65551f652	Give PLB the same stack behaviour as PLD.	2024-09-21 21:08:02 -04:00
Thomas Harte	f0d807a0fe	Fix [d], y page-wrapping behaviour.	2024-09-21 20:49:59 -04:00
Thomas Harte	dfcdbe5b6a	Merge pull request #1402 from TomHarte/CPCInterruptTiming ... Pull CPC interrupt to start of hsync.	2024-09-12 21:12:02 -04:00
Thomas Harte	53e73238fd	Merge pull request #1403 from TomHarte/OricVSync ... Extend Oric vsync to four lines.	2024-09-12 21:08:51 -04:00
Thomas Harte	581454db69	Tweak mode latch time too.	2024-09-12 20:47:27 -04:00
Thomas Harte	63d501b629	Pull interrupt to start of hsync.	2024-09-12 20:45:28 -04:00
Thomas Harte	60bd877ed9	Merge pull request #1401 from TomHarte/OricVSync ... Add the Oric's v-sync hardware hack.	2024-09-10 21:18:03 -04:00
Thomas Harte	44574465c5	Extend vsync to four lines.	2024-09-10 21:06:49 -04:00
Thomas Harte	2b7382a014	Loop in vsync as a potential tape input.	2024-09-10 20:59:05 -04:00
Thomas Harte	584b6df40d	Tweak 60Hz period.	2024-09-10 20:43:01 -04:00
Thomas Harte	e55f61deb2	Add vsync getter.	2024-09-10 20:31:35 -04:00
Thomas Harte	a6c6a1c6da	Eliminate macros.	2024-09-10 20:29:34 -04:00
Thomas Harte	bdb5abe47b	Record updated version number.	2024-09-08 21:34:02 -04:00
Thomas Harte	dbe0ebc93e	Merge pull request #1400 from TomHarte/DelegateOrderTest ... Fix order of `if` tests.	2024-09-08 21:30:44 -04:00
Thomas Harte	1c2f66e855	Fix order of if tests.	2024-09-08 21:23:58 -04:00
Thomas Harte	7eee3f9e5e	Merge pull request #1399 from TomHarte/ElectronULARedux ... Replace Electron graphics generation with FPGA transcription.	2024-09-08 21:23:09 -04:00
Thomas Harte	b7f069e1bd	Add a colour burst.	2024-09-08 21:12:45 -04:00
Thomas Harte	51c8396e32	Fix faulty centring.	2024-09-08 21:06:59 -04:00
Thomas Harte	0efe649ca5	Post pixel clock.	2024-09-08 20:57:43 -04:00
Thomas Harte	75db0018bc	Add note on provenance.	2024-09-08 20:20:03 -04:00
Thomas Harte	2a9e1ea045	Use normal member naming convention.	2024-09-08 20:16:43 -04:00
Thomas Harte	8feb8aaadc	Reintroduce cropping, even if faulty.	2024-09-06 22:12:19 -04:00
Thomas Harte	b8f4385501	Fix palette generation.	2024-09-06 21:47:13 -04:00
Thomas Harte	d8b6d87a1c	Attempt colour.	2024-09-06 21:36:05 -04:00
Thomas Harte	f10702b3ca	Edge towards proper serialisation.	2024-09-06 21:01:30 -04:00
Thomas Harte	88248d7062	Fix base address, delays.	2024-09-06 20:55:26 -04:00
Thomas Harte	5ca1659bcc	Do just enough to get 1bpp fixed-palette pixels.	2024-09-06 20:36:27 -04:00
Thomas Harte	59530a12fd	Sub in basic transliteration of hoglet's FPGA.	2024-09-06 20:21:46 -04:00
Thomas Harte	aab2dd68b6	Substitute in a real-time video generator.	2024-09-06 20:18:29 -04:00
Thomas Harte	83f5065642	Update version.	2024-08-26 21:38:49 -04:00
Thomas Harte	7e3a331eba	Merge pull request #1394 from TomHarte/ElectronFlicker ... Electron: don't miss interrupts early in the frame.	2024-08-26 21:28:53 -04:00
Thomas Harte	b5932edff3	Avoid missed interrupts on wraparound.	2024-08-26 21:13:49 -04:00
Thomas Harte	12846317cb	Short-circuit non-interrupts.	2024-08-26 21:13:25 -04:00
Thomas Harte	051f0546c7	Merge pull request #1393 from TomHarte/ZXAnalysis ... Improve Spectrum +3 disk analysis.	2024-08-24 21:45:45 -04:00
Thomas Harte	eece8c54a4	Factgor out and reuse is-ZX test.	2024-08-22 21:17:35 -04:00
Thomas Harte	69ba94e379	Add some CP/M smarts to +3 disk analysis.	2024-08-20 21:43:31 -04:00
Thomas Harte	0de7057d6f	Use standard algorithm.	2024-08-20 20:45:43 -04:00
Thomas Harte	3dcbb40c55	Merge pull request #1391 from TomHarte/SSLandCSL ... Treat second argument to key_delay as optional.	2024-08-14 19:56:18 -05:00
Thomas Harte	91b263f0cf	Treat second argument as optional.	2024-08-14 20:55:33 -04:00
Thomas Harte	bcd558867d	Merge pull request #1387 from TomHarte/SSLandCSL ... CPC: implement CSL and SSM to run Shaker tests.	2024-08-14 19:55:18 -05:00
Thomas Harte	a9c8ef642c	Correct original author's typo.	2024-08-14 18:55:35 -04:00
Thomas Harte	43887b42b1	Allow vsync on line 0.	2024-08-07 23:05:26 -04:00
Thomas Harte	30b1b36e63	Test digits individually; CSLs autolink.	2024-08-07 22:44:48 -04:00
Thomas Harte	ef11262721	Expand test membership.	2024-08-07 22:15:43 -04:00
Thomas Harte	2d049f5fdc	Implement reset, correct file names.	2024-08-07 22:00:24 -04:00
Thomas Harte	05f0a122f4	Blank out border.	2024-08-05 22:06:23 -04:00
Thomas Harte	1977675a73	Add some measure of graphics output.	2024-08-05 21:48:40 -04:00
Thomas Harte	4ceaab7c26	Merge branch 'master' into SSLandCSL	2024-07-26 22:08:11 -04:00