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1,237 Commits 8 Branches 121 Tags 496 MiB
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482 Commits

Author SHA1 Message Date
Thomas Harte
89a1881fef Started turning the 1540 into an actual disk drive. 2016-07-29 11:03:09 -04:00
Thomas Harte
ada2f073e0 Completed handing of the disk all the way to the 1540. 2016-07-10 16:24:46 -04:00
Thomas Harte
6cfc514c2d Made the rote changes necessary to attempt to open and to supply a G64 to the Vic. 2016-07-10 12:57:17 -04:00
Thomas Harte
4ca6883f7c Disabled attachment of a 1540 again, as I probably need to move to opening an actual disk image next. 2016-07-10 08:03:36 -04:00
Thomas Harte
824d9ea92b Added further comments. 2016-07-10 08:01:16 -04:00
Thomas Harte
d8334edf4a Started trying to clean up, including commuting the C1540 source file name to match its class name but mainly by adding documentation. 2016-07-10 07:46:20 -04:00
Thomas Harte
c0ab45a73d Disabled a bunch of the caveman debug logging. 2016-07-09 22:29:11 -04:00
Thomas Harte
f589d639db Okay, so it seems that sync also works the other way around. 2016-07-09 22:25:44 -04:00
Thomas Harte
693c8b2438 After all that, it seems likely that inputs just aren't inverted for the Vic. 2016-07-09 20:03:38 -04:00
Thomas Harte
656cd211d7 Was transmitting bit levels backwards (probably?); 1540 now acknowledges byte received. 2016-07-09 18:06:49 -04:00
Thomas Harte
7cc4bf3fe7 Hit and hope is getting me nowhere. Time to unit test this thing. 2016-07-09 15:40:25 -04:00
Thomas Harte
8827597363 Messier and messier, but I've at least attempted to implement hardware attention acknowledge. 2016-07-08 19:00:39 -04:00
Thomas Harte
9a08ef61cb Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs. 2016-07-07 22:13:18 -04:00
Thomas Harte
199c0e27e0 Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning. 2016-07-07 07:16:36 -04:00
Thomas Harte
81e6cc34e5 Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus. 2016-07-07 06:57:21 -04:00
Thomas Harte
c9479f923b The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive. 2016-07-07 06:44:13 -04:00
Thomas Harte
dcb86a027a Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps. 2016-07-06 22:31:14 -04:00
Thomas Harte
1baf21827c Since the ROM is well disassembled, let's actually try to be a 1541 first. 2016-07-06 22:17:32 -04:00
Thomas Harte
4f174786b5 Fixed potential buffer overrun. 2016-07-06 21:39:09 -04:00
Thomas Harte
f64cd8cfcb Quick fixes properly to declare the DriveVIA, to ensure its interrupts take effect, and to wire ATN IN to CA1 rather than CB2. 2016-07-06 20:22:46 -04:00
Thomas Harte
428fcdb978 Centralised and improved serial logging. 2016-07-06 07:46:21 -04:00
Thomas Harte
8819711bc8 Threw in the second VIA as a currently clearly incorrect thing. 2016-07-05 22:22:09 -04:00
Thomas Harte
93c2bb80a2 Improved a comment, added independent C[A/B]2 input mode. 2016-07-05 21:11:51 -04:00
Thomas Harte
6c4fa4ec5d Improved commenting and initial state communication. 2016-07-05 20:57:31 -04:00
Thomas Harte
1e6d90de17 Made an attempt properly to deal with initial bus state. 2016-07-05 20:52:33 -04:00
Thomas Harte
c3b7d24293 It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court. 2016-07-05 19:19:46 -04:00
Thomas Harte
11fc43aa04 Made an attempt to allow the 1540 to talk back to the Vic, and to receive interrupts. Also slightly disambiguated debugging logging. 2016-07-05 19:12:43 -04:00
Thomas Harte
d16b79073e Further fleshing out: added a serial port for the serial bus. 2016-07-05 17:27:02 -04:00
Thomas Harte
d1eea6943d Ensured the 1540 ROM gets installed, at least. 2016-07-05 16:54:25 -04:00
Thomas Harte
86dabd007b Furthered fleshing out of the 1540. Though it doesn't yet receive a ROM so won't even attempt to do anything meaningful. 2016-07-05 16:39:18 -04:00
Thomas Harte
a25fcc7190 Made a first attempt at wiring back serial port input. 2016-07-05 16:10:54 -04:00
Thomas Harte
d2cded7b59 Attempted to separate out the concept of a serial port and a serial bus, since the bus may be shared, and to establish half duplex communications from the Vic. 2016-07-05 14:55:20 -04:00
Thomas Harte
0d3d0fbe4d Created a namespace for Commodore and an empty container file for the 1540[/1] implementation. 2016-07-05 13:28:27 -04:00
Thomas Harte
97751a9d86 Took the preliminary steps necessary to wire up a serial port. 2016-07-05 10:55:47 -04:00
Thomas Harte
a49f2b41cc Added C++ side of things. I think. 2016-07-04 21:48:25 -04:00
Thomas Harte
8db44eed3e Added a default implementation of Speaker::skip_samples. 2016-07-04 20:48:27 -04:00
Thomas Harte
bfa237397d Settled on assigning to nullptr as the appropriate style for emptying shared_ptrs; fixed the Vic properly to release its output resources. 2016-07-04 20:34:11 -04:00
Thomas Harte
88964ceac0 Eliminated plain pointer passing for object types. 2016-07-04 19:33:55 -04:00
Thomas Harte
82b0bc9b58 Discovered that this is another meaningful usage of using. 2016-07-04 19:10:10 -04:00
Thomas Harte
7e5b631e30 Cut some dead code. 2016-07-01 19:02:29 -04:00
Thomas Harte
7fa010a463 Attempted to add support for the most basic of control line output, and slightly to optimise the Vic. 2016-07-01 19:01:22 -04:00
Thomas Harte
ed8f4d0476 Added some minor additional bits of documentation. 2016-06-30 08:46:29 -04:00
Thomas Harte
0182b0483a Added a 'power on' flag that is set automatically at construction but can be declined. Saves all that stuff of every machine having to set and then unset the RST line, and fixes an Electron bug related to that. 2016-06-29 19:13:24 -04:00
Thomas Harte
6027cba95f Factored out the stuff of pushing a fast-loading option onwards and storing it within the user defaults. 2016-06-27 21:38:14 -04:00
Thomas Harte
e3e6bbb785 Removed the colon again, until I can educate myself a little further. 2016-06-26 21:38:03 -04:00
Thomas Harte
69d78dfdb3 Removed logging. 2016-06-26 21:36:26 -04:00
Thomas Harte
1439ca0580 Added a quick automatic issuing of the 'LOAD' command. 2016-06-26 21:34:37 -04:00
Thomas Harte
843d1fdca7 Added some extra logging while trying to determine what's going on; added interrupt clearing for the control lines. 2016-06-26 21:30:06 -04:00
Thomas Harte
2a2c3da5d4 Added hardwired tape present bit. 2016-06-26 19:50:49 -04:00
Thomas Harte
c306d705e1 Made a quick first attempt at all-the-way-through tape wiring for the Vic. 2016-06-26 19:43:09 -04:00
Thomas Harte
37ba42a52f Factored out the stuff of playing a tape, started basic sketch of the Vic-related classes. 2016-06-26 19:03:57 -04:00
Thomas Harte
d5e50f5ea0 Got a bit more explicit about how ports are identified on the 6522. 2016-06-26 12:30:01 -04:00
Thomas Harte
8d9eb30d82 So it sounds like the user-port VIA might actually be connected to NMI? 2016-06-25 16:31:35 -04:00
Thomas Harte
8741be5c84 Made the slightest possible effort to get TAPs opened and passed to the VIC. 2016-06-25 16:24:52 -04:00
Thomas Harte
2bd71e7e9b .reset is the more normal way to reassign a unique_ptr. 2016-06-23 20:52:44 -04:00
Thomas Harte
e05003c176 Discovered that the VIC and the VIAs can be simultaneously selected. Adjusted bus appropriately. 2016-06-22 17:34:42 -04:00
Thomas Harte
454e98302d Slight rearrangement plus a setting of the CSMachine delegate corrects audio after a clock rate change. 2016-06-20 22:18:41 -04:00
Thomas Harte
31b26b8118 Made a first attempt to implement the full top-to-bottom change of clock rates, giving the Atari the ability to change rate when it switches to PAL mode, as it should always have been. 2016-06-20 21:47:27 -04:00
Thomas Harte
88e2b382e5 Made an attempt at a full and thorough 6532 implementation (and got a bit more explicit about flag size in the 6502). 2016-06-20 18:57:35 -04:00
Thomas Harte
b6dd38dad3 Corrected type safety warning. 2016-06-19 21:41:01 -04:00
Thomas Harte
065ec618c4 Factored out and templated the 6532, finally taking the opportunity to add a means to control the on-console switches of an Atari 2600. 2016-06-19 19:36:34 -04:00
Thomas Harte
65413f078c Factored out the 6532, eventually to make it testable. 2016-06-19 18:57:40 -04:00
Thomas Harte
6dd8ea67c9 Tested and trimmed delay on typing if resetting. 2016-06-19 17:27:23 -04:00
Thomas Harte
05cb47709e Implemented Utility::Typer for the Electron. So that now also receives pastes. 2016-06-19 17:25:35 -04:00
Thomas Harte
ef3ed1f436 Implemented full paste ability for any machine that is a typer. 2016-06-19 16:35:04 -04:00
Thomas Harte
3fc472d5cb Expanded typing to include phase for machines that need to go through multiple keypresses to reach a certain state, expanded Vic to be able to type most things (still bodged on lowercase though), and to schedule a 'run' if it's supposed to be loading into RAM, spotting that opportunity actually to do so. 2016-06-19 13:46:53 -04:00
Thomas Harte
e7aeed2f03 Established a general pattern for machines that can type things. Started working on the Vic typing itself. 2016-06-19 13:10:52 -04:00
Thomas Harte
f4915c5ad6 Fixed test and added basic implementation of data direction. 2016-06-18 17:17:03 -04:00
Thomas Harte
394902f409 Switched to clocking the 6522 by the half-cycle. Very trivial test now passes. 2016-06-18 13:57:10 -04:00
Thomas Harte
595791cee0 Made the base 6522 class more abstract: you must now opt-in if you want the IRQ line to be sent to a delegate. 2016-06-18 08:51:18 -04:00
Thomas Harte
00a9f1bf24 Fixed best-effort updater actually to run, finally moved clock rate announcement into the C++ side of things, started working on a mechanism to allow clock rate to be updated. 2016-06-16 20:39:46 -04:00
Thomas Harte
fdc854c0c2 Fixed tone channels; made an attempt at loading PRGs that are supposed to go into RAM. 2016-06-13 21:49:59 -04:00
Thomas Harte
5fc36b956c Attempted most basic sketching of a container for Vic audio. 2016-06-13 19:30:52 -04:00
Thomas Harte
4190b42bbb No need for these to live separately, I think. 2016-06-13 18:27:18 -04:00
Thomas Harte
19b2f46488 Fixed accesses to colour memory. 2016-06-12 11:06:19 -04:00
Thomas Harte
4fec625b19 Minor cleaning, implemented clearAllKeys. 2016-06-12 10:38:21 -04:00
Thomas Harte
167ed9b8bb Added enough to load a PRG as a ROM. 2016-06-11 14:00:12 -04:00
Thomas Harte
3e8d383615 Improved key map. Possibly enough to type some basic BASIC? 2016-06-11 13:19:59 -04:00
Thomas Harte
d1731b1d26 Hacked my 6522 to work. Mistake is in not returning output as input when appropriate — i.e. that I'm ignoring data direction. Also fixed K and L keys. 2016-06-11 13:06:01 -04:00
Thomas Harte
271de23ee6 Ran on in and introduced a bunch more keys, hopefully to help to diagnose. 2016-06-11 12:26:19 -04:00
Thomas Harte
d7c1f5b18a Made an attempt at hooking up the '2' and '4' keys. A mostly unsuccessful attempt. 2 does nothing, 4 clears the screen. 2016-06-11 11:50:37 -04:00
Thomas Harte
7a241b5ef5 Added just enough hopefully to allow implementation of the keyboard-input VIA. 2016-06-11 11:34:39 -04:00
Thomas Harte
12d1cac751 Merge branch 'master' into Vic-20 2016-06-10 18:23:55 -04:00
Thomas Harte
805e2d15c6 Fixed timing when clock is divided. 2016-06-10 18:20:16 -04:00
Thomas Harte
1ed04fae1e Resolved 6560 addressing. 2016-06-10 18:12:21 -04:00
Thomas Harte
f3b1d7de82 ... and that's a flashing cursor. Keyboard input next! 2016-06-09 22:37:59 -04:00
Thomas Harte
30b7db3979 Attempted a square wave, made the Vic itself responsible for address manipulation re:the 6560. 2016-06-09 22:05:17 -04:00
Thomas Harte
e99055bedb Attempted switching back to a square wave for the composite video and otherwise implementing what's necessary to get to that flashing cursor — the 6560 returns its scan line and the timing bits of the 6522 are appearing. 2016-06-08 22:15:24 -04:00
Thomas Harte
581eace478 Increased logging slightly, ensured all of colour RAM can be read, slightly improved the 2600 pixel decoder. 2016-06-07 22:01:14 -04:00
Thomas Harte
26ab96868a Decided to turn the 6522 into a template, since it's a per-cycle thing with variable behaviour. Added appropriate memory map callouts to hit the two in the Vic. Though they don't yet do anything. 2016-06-07 19:15:18 -04:00
Thomas Harte
c7c55528e2 Realised that registers appear also to be readable. 2016-06-06 20:29:39 -04:00
Thomas Harte
64539a2b24 Advanced to having some characters displayed, even though they're obviously very much incorrect and the display is still rolling. 2016-06-06 07:35:35 -04:00
Thomas Harte
9e9e50edb1 Added guess on how colour memory and the 12-bit bus possibly works. 2016-06-05 16:28:06 -04:00
Thomas Harte
2ab21e7a3c Switched to a real (unexpanded) memory map, meaning that nonsense is no longer being supplied to the VIC. 2016-06-05 16:00:35 -04:00
Thomas Harte
9566c87532 Added enough to the machine that the 6560 can now produce output if it wishes. 2016-06-05 12:11:12 -04:00
Thomas Harte
b56482607e Added just enough that the 6502 should now be operating correctly. 2016-06-05 11:44:29 -04:00
Thomas Harte
0b221e773f Fixed ROM naming and sizes, ensured machines without sound outputs don't end up with an audio queue. 2016-06-05 11:20:05 -04:00
Thomas Harte
f922d38ed2 The Vic now captures the ROMs sent to it and has just enough infrastructure to get to a black screen. Progress! 2016-06-05 10:51:07 -04:00
Thomas Harte
12243c40ad Kicking the ball a little further down the road, ROMs and PRGs now reach the actual emulated machine. 2016-06-05 09:06:59 -04:00
Thomas Harte
b10a06e700 A CRT is still absent but this moves the ball back into the C++ side's court. 2016-06-04 22:00:50 -04:00
Thomas Harte
404873fe58 Started sketching out infrastructure for Vic-20 support. 2016-06-04 21:43:50 -04:00
Thomas Harte
604862b20b Fixed playfield/missile and playfield/ball collisions. 2016-06-02 22:36:52 -04:00
Thomas Harte
e3b95b8d2b Back to asynchronous updates and drawing, to try to improve guarantees on audio latency; experimenting with whether other parts of the approach are fundamentally flawed; added a broad-phase for scheduled updates on the 2600. 2016-06-02 21:22:55 -04:00
Thomas Harte
11073daee1 Issues appear to be around timing generally. Working on it. 2016-06-02 20:15:48 -04:00
Thomas Harte
7aac306a12 Quick fix to the polynomials. 2016-06-02 19:56:02 -04:00
Thomas Harte
253e5a4203 With no regard to performance whatsoever, endeavoured to bring sound to the 2600. It's very scratchy, so something is wrong. 2016-06-02 19:50:16 -04:00
Thomas Harte
1e0fcbbee8 Made a very basic stab at a couple of the tone generators, added straight-through path for the speaker when input rate exactly equals output rate. 2016-06-01 19:53:16 -04:00
Thomas Harte
40c4544fb7 Got the basic sound pipeline pumping, just enough for static-level audio seemingly to work. Berzerk VE says "intruder alert, intruder alert", anyway. 2016-06-01 19:27:04 -04:00
Thomas Harte
8dc66167be Made an attempt to consolidate the Objective-C++ side of things based on the incoming CRTMachine::Machine. 2016-05-31 22:16:20 -04:00
Thomas Harte
5c4f35e13f Finally started on generalising the C++ stuff so as to be able to be able to get a working audio binding on the OS-specific side without further repetition by factoring an appropriate protocol out from the Electron and sketching out the correct speaker class for the Atari. Added a method to ask it what a good output frequency would be. 2016-05-31 21:23:44 -04:00
Thomas Harte
3fc80ea01f Rethought, hopefully perfecting, sprite timing. 2016-05-30 19:56:36 -04:00
Thomas Harte
8b342f77a9 Made an attempt further to rationalise timing. 2016-05-27 21:51:27 -04:00
Thomas Harte
91d3453cc1 Switched to looking backwards rather than forwards. 2016-05-27 14:33:08 -04:00
Thomas Harte
106ddae907 Sprites are still a pixel off but better; made some attempt to move things outside of the loop. 2016-05-25 21:43:19 -04:00
Thomas Harte
40c2c0bd2d Minor simplifications and improvements. Still trying to figure out what's causing the non-linear edge addressing. 2016-05-25 21:12:25 -04:00
Thomas Harte
b01b474e36 I'm back to thinking that resets are deferred but pixel counts are live. 2016-05-25 07:32:25 -04:00
Thomas Harte
758806f924 Introduced a separate queue for pixels, which may or may not be correct. 2016-05-24 21:39:57 -04:00
Thomas Harte
0b081831a9 Set up a pipeline for all pixels that attempts to allow for appropriate delays. 2016-05-24 07:58:26 -04:00
Thomas Harte
5c1e594937 Realised there's a clocking delay on starting horizontal move. Which fixes Coke Zero. 2016-05-22 21:45:40 -04:00
Thomas Harte
c3e719c4ab Added missile-to-player offsetting. Completing the list of graphics-related TODOs. 2016-05-22 17:01:56 -04:00
Thomas Harte
4c6d4d899d Ensured that resetting the horizontal timer affects phase. 2016-05-22 16:29:53 -04:00
Thomas Harte
df93d7849d Re-enabled the ball. 2016-05-22 14:38:14 -04:00
Thomas Harte
0242924fb4 Various bits of caveman debugging appearing and disappearing, switched to latching ball behaviour. 2016-05-22 14:26:02 -04:00
Thomas Harte
5e220562e4 Actually, the four-clock delay, with palette taking effect immediately, appears to be correct. So back to the drawing board on that. 2016-05-21 21:44:54 -04:00
Thomas Harte
4eded9b9d0 Re-enabled collisions. 2016-05-21 13:05:36 -04:00
Thomas Harte
b1c84f5402 Counters run every scan line regardless of blank and sync. Also played further with timing. 2016-05-21 12:54:39 -04:00
Thomas Harte
470c90428a Switched to two-register implementation of VDELP, etc. 2016-05-21 10:26:27 -04:00
Thomas Harte
36d19cb6cf Made an attempt at properly pumping timers during hmove. 2016-05-21 10:18:15 -04:00
Thomas Harte
a952813036 Fixed missile sizes, played about with ball placement. 2016-05-19 18:30:17 -04:00
Thomas Harte
cf5b8ab92e This is now approximately back to where it was on Cosmic Ark. 2016-05-19 08:30:10 -04:00
Thomas Harte
40600b4bcb Made sprite placement consistent at least. Not necessarily yet correct. 2016-05-18 22:07:24 -04:00
Thomas Harte
e61392d3fb Fixed incorrect duplication. 2016-05-18 21:50:28 -04:00
Thomas Harte
8c7ce1ec3f Attempted to fix sprite sizing and, again, missile repetition. 2016-05-18 21:41:25 -04:00
Thomas Harte
d013d46337 Fixed object motion decoding and checking of the repeat mask for missile graphics. 2016-05-18 21:36:28 -04:00
Thomas Harte
83ed6a82cf Fixed: asserting vertical blank doesn't affect underlying timing. 2016-05-18 18:49:40 -04:00
Thomas Harte
877c55b5c5 Threw in missiles. To 'complete' graphics output. Or, rather, to move me on to debugging. 2016-05-18 07:54:44 -04:00
Thomas Harte
354143a78c Reintroduced an attempt to plot sprites. 2016-05-18 07:51:25 -04:00
Thomas Harte
0b99649b0f Had a first shot at triggering player and missile resets. 2016-05-18 07:31:05 -04:00
Thomas Harte
b8708b805c The vertical blank flag now works again. 2016-05-17 22:02:57 -04:00
Thomas Harte
a1e63e8320 Attempted to generalise on pixel counter storage, at least. Further adjusted background timing but I'm still not sure. 2016-05-17 21:41:32 -04:00
Thomas Harte
ad6f405483 Fixed: was off by one on pixels, allowing four extra pixel output cycles per line. 2016-05-17 19:02:32 -04:00
Thomas Harte
c96674b341 Made genuine first approximate attempt at hmove. 2016-05-17 18:35:40 -04:00
Thomas Harte
d170bb14e6 Extended scheduling plans, inserted initial events for hmove, albeit not yet implemented. 2016-05-17 18:21:49 -04:00
Thomas Harte
6a961c4d28 Added something of the ball counter, but without yet a working HMOVE it's prone to error. 2016-05-17 07:18:14 -04:00
Thomas Harte
7d3cf76576 Generalised slightly, to allow events to be queued up to eight cycles in advance; most importantly each event gets to pick its own delay. 2016-05-17 07:09:18 -04:00
Thomas Harte
3d003070b3 Made an attempt better to generalise the idea of things with 4 CLK delays. 2016-05-16 21:54:27 -04:00
Thomas Harte
4ad074fc78 Introduced a four-cycle delay between playfield fetch and display, curing Yar's Revenge. Also disabled barrel roll scanling colouring again. I really need to make my mind up on that. 2016-05-16 19:55:56 -04:00
Thomas Harte
f19ed2e8f8 Started merely attempting to reintroduce the background layer. 2016-05-16 19:04:13 -04:00
Thomas Harte
9d92ad659f Established the basic timing loop, albeit without clocking delays yet. 2016-05-16 08:01:29 -04:00
Thomas Harte
cca53598d3 Made another run at 2600 colours. 2016-05-14 16:52:24 -04:00