124 Commits

Author	SHA1	Message	Date
Thomas Harte	e5b30cdfbb	Attempted to ensure appropriate resumption of processing after quick-reading a tape byte.	2017-06-11 17:28:47 -04:00
Thomas Harte	ba5f34f827	Narrowed view to the centre 80% of a frame.	2017-06-11 17:24:32 -04:00
Thomas Harte	84d2feb2e6	Cleaned up and implemented fast-tape hack. I've decided it'd be better to test some other software, potentially to give multiple issues to think about, rather than sitting around with just the one.	2017-06-11 16:42:49 -04:00
Thomas Harte	d910a4fd38	Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207. ... Also: lots of printfs have grown temporarily as I try to figure out what I'm doing so wrong as to break loading.	2017-06-11 13:32:20 -04:00
Thomas Harte	5626d35bc4	Tried flipping the bit meaning; decided at least to leave it in full-byte form.	2017-06-06 18:38:05 -04:00
Thomas Harte	63e0802f4e	Ensured tape input appears on the returned value.	2017-06-06 18:16:27 -04:00
Thomas Harte	e3ee9604a5	Added comments.	2017-06-06 18:01:33 -04:00
Thomas Harte	8c66e1d99d	Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data.	2017-06-06 17:53:23 -04:00
Thomas Harte	ca9e8aecd6	Made a seemingly unsuccessful attempt to add tape input.	2017-06-06 10:13:32 -04:00
Thomas Harte	cc4cb45e9d	Implemented keyboard input and ensured that the signal generated is marked as composite, putting the colour-suppression ball into the CRT's court.	2017-06-06 09:25:18 -04:00
Thomas Harte	ebbf6e6133	Surprisingly, I think this may actually be the correct output: stopped throwing away the I part of the refresh register and flipped black and white.	2017-06-06 09:03:09 -04:00
Thomas Harte	cba07dec7e	Doubled up to display all eight pixels. To confirm that they are the wrong pixels.	2017-06-06 08:59:00 -04:00
Thomas Harte	6f7037b2b1	Made an initial stab at outputting half the correct pixels.	2017-06-06 08:55:07 -04:00
Thomas Harte	ef4b2f963d	Probably more-or-less corrected. But this is all a bit too interdependent.	2017-06-05 23:52:56 -04:00
Thomas Harte	97f3ff03b6	Restored white background and attempted to correct output timing deficiencies. Incomplete success.	2017-06-05 23:50:04 -04:00
Thomas Harte	2fbc7a2869	Made a very basic attempt at getting something that at least demarcates proper graphics output.	2017-06-05 23:32:49 -04:00
Thomas Harte	4983718df7	Got to outputting something to the CRT. Should be just proper syncs and a paper background. It's not synchronising properly, so something is amiss in my timing.	2017-06-05 10:47:42 -04:00
Thomas Harte	23ca00fd9a	Added memory fuzzing as a way to verify state being written by the Z80. Eventually discovered the HALT problem as fixed in the last commit, so have stripped away the caveman stuff again.	2017-06-05 10:36:07 -04:00
Thomas Harte	893f61b490	Attempted specifically to reproduce the 1kb ZX80 memory map in the hope of getting compact lines and in case mirroring is why I'm getting completely empty video reads. Still no action.	2017-06-05 09:38:49 -04:00
Thomas Harte	7e3a46c33e	[Re]discovered that sync may also be a product of the interrupt cycle. So started looking into that.	2017-06-04 21:54:55 -04:00
Thomas Harte	73654d51dd	Wired up actually to run.	2017-06-04 18:37:13 -04:00
Thomas Harte	096551ab3e	Made a first attempt to hash out the ZX80's bus. Video output isn't yet going though. Can't seem to find clarity on whether horizontal sync is really programmatic. Let's see.	2017-06-04 18:32:23 -04:00
Thomas Harte	c485c460f7	Imported the ZX80 and 81 system ROMs (though not publicly), added enough code to post their contents into C++ world.	2017-06-04 18:08:35 -04:00
Thomas Harte	d2637123c4	Added necessary support to get as far as an empty window when attempting to load a piece of ZX80 software.	2017-06-04 17:55:19 -04:00