Thomas Harte
|
f6fd49d950
|
Relocate all text wrangling; this isn't really test-specific.
|
2023-10-04 22:35:52 -04:00 |
|
Thomas Harte
|
40af162214
|
Be overt about what's here to aid with printing only.
|
2023-10-04 22:15:13 -04:00 |
|
Thomas Harte
|
92c46faf84
|
Add SETMO and SETMOC.
|
2023-09-29 22:28:23 -04:00 |
|
Thomas Harte
|
ff9237be9f
|
Decode SALC.
|
2023-09-29 22:06:42 -04:00 |
|
Thomas Harte
|
6cbb434482
|
Deal with all dangling aliases.
Leaves just five undocumented instructions.
|
2023-09-29 15:36:34 -04:00 |
|
Thomas Harte
|
103f42f0b0
|
Introduce FF.7 alias.
|
2023-09-29 15:26:25 -04:00 |
|
Thomas Harte
|
f2732962d0
|
Add 6x 8086 aliases.
|
2023-09-29 15:22:05 -04:00 |
|
Thomas Harte
|
ef5ee8cf94
|
Include missing context on JMP/CALL far.
Zero failing tests amongst official opcodes.
|
2023-09-29 14:57:08 -04:00 |
|
Thomas Harte
|
1a6c8a2aed
|
Add outputters for IN and OUT.
2 failures remaining.
|
2023-09-29 09:39:51 -04:00 |
|
Thomas Harte
|
b76899f2bc
|
Undo broken extension-word DS assumption.
8 failures.
|
2023-09-28 22:17:14 -04:00 |
|
Thomas Harte
|
245919e67d
|
Resolve REPNE and whitespace issues.
|
2023-09-28 22:01:12 -04:00 |
|
Thomas Harte
|
ae4a588de3
|
Adjust semantics to avoid culling end of relevant RETs.
|
2023-09-28 15:24:15 -04:00 |
|
Thomas Harte
|
960cca163e
|
Make better guess at CALL/JMP size; apply same sizing-logic as offset for disassembly matching.
13 failures.
|
2023-09-28 14:52:42 -04:00 |
|
Thomas Harte
|
249da884a7
|
Trim trailing space.
|
2023-09-28 13:59:41 -04:00 |
|
Thomas Harte
|
035a1265f6
|
Map invalid reg numbers properly for the 8086.
17 failures.
|
2023-09-28 13:11:15 -04:00 |
|
Thomas Harte
|
ff4d79e77e
|
Add test synonym, fix operand size.
19 failures.
|
2023-09-28 09:43:26 -04:00 |
|
Thomas Harte
|
78cb39ad67
|
Also fix AddrReg.
24 failures.
|
2023-09-27 22:47:14 -04:00 |
|
Thomas Harte
|
9207de4164
|
Fix RegAddr macro.
26 failures.
|
2023-09-27 22:44:10 -04:00 |
|
Thomas Harte
|
c20e7ed9b6
|
Fix TEST.
28 failures.
|
2023-09-27 22:30:40 -04:00 |
|
Thomas Harte
|
2d882d2153
|
Switch shift/roll semantics to reduce extension words and for sanity generally.
37 failures.
|
2023-09-27 16:40:46 -04:00 |
|
Thomas Harte
|
b59eae3676
|
Adopt normative ESC decoding.
55 failures.
|
2023-09-27 10:32:22 -04:00 |
|
Thomas Harte
|
5368f789f6
|
Shuffle list slightly.
|
2023-09-26 17:30:27 -04:00 |
|
Thomas Harte
|
b03b408984
|
Give the decoder responsibility for sanity-checking repetitions.
This may avoid some spurious extension words.
|
2023-09-26 17:29:20 -04:00 |
|
Thomas Harte
|
cd072e1b57
|
LEA implies a word. Otherwise add TODOs.
So that's now 69 failures.
|
2023-09-26 15:41:51 -04:00 |
|
Thomas Harte
|
f16ac603f2
|
Deal with printing segment:offset.
70 failing files remaining.
|
2023-09-26 15:28:51 -04:00 |
|
Thomas Harte
|
0a0051eb59
|
I've just been inconsistent with POP. Stop being so.
71 failures from 288 tests.
|
2023-09-26 15:16:41 -04:00 |
|
Thomas Harte
|
92c8e1ca93
|
Add missing #include.
|
2023-09-26 14:52:08 -04:00 |
|
Thomas Harte
|
87097c44b9
|
Curate list of known failures; apply easiest fixes.
Now at 157 failures of 288 applicable tests.
|
2023-09-25 11:39:12 -04:00 |
|
Thomas Harte
|
7fadf01e4e
|
BP in isolation acts as a base.
|
2023-09-24 18:06:53 -04:00 |
|
Thomas Harte
|
d2b9c435e5
|
Allow for non-sign-extended offsets/displacements.
|
2023-09-24 15:00:16 -04:00 |
|
Thomas Harte
|
5fd98e9833
|
Add an ignore list.
Leaves 180 failures amongst the valid 306 instructions.
|
2023-09-22 22:56:33 -04:00 |
|
Thomas Harte
|
787e9e770e
|
Retain baseless addresses correctly.
|
2023-09-22 17:27:27 -04:00 |
|
Thomas Harte
|
c8c0c3ca6d
|
Default segment is ::DS if there was no base.
|
2023-09-22 17:03:40 -04:00 |
|
Thomas Harte
|
5a5f71e703
|
JMPs imply their size.
|
2023-09-22 17:00:10 -04:00 |
|
Thomas Harte
|
587ec81900
|
Improve string output, better to find actual errors.
Still at 194/324 failures, but a lot of them seem reasonable.
|
2023-09-22 11:24:33 -04:00 |
|
Thomas Harte
|
9f63db991c
|
Capture default segments, fix base/index confusion.
|
2023-09-22 11:07:09 -04:00 |
|
Thomas Harte
|
7ebecd2f41
|
Add notes to self, finally figuring out segment issue.
|
2023-09-19 23:27:42 -04:00 |
|
Thomas Harte
|
6f5fcf23dc
|
Add missing substitutions.
|
2023-09-19 14:00:27 -04:00 |
|
Thomas Harte
|
02fcaf0dbd
|
JCXZ seems to be preferred over JPCX.
|
2023-09-19 13:56:48 -04:00 |
|
Thomas Harte
|
a7cf7d3183
|
Resolve LOOPNE, LOOPE, etc.
|
2023-09-19 13:55:19 -04:00 |
|
Thomas Harte
|
9b3199d97b
|
Reduce failures to 205/324.
|
2023-09-19 13:45:19 -04:00 |
|
Thomas Harte
|
e5dfc882cb
|
Agree that JZ/JNZ are clearer (for me) of the synonyms.
|
2023-09-19 13:38:08 -04:00 |
|
Thomas Harte
|
3582d2c9e3
|
Start to beef up operand count list.
|
2023-09-18 16:34:52 -04:00 |
|
Thomas Harte
|
da953fdf0d
|
Complete 8086 operation list; standardise enum order.
|
2023-09-18 16:25:04 -04:00 |
|
Thomas Harte
|
710017ada2
|
Largely resolve the operation-name problem.
|
2023-09-18 15:57:26 -04:00 |
|
Thomas Harte
|
f8dc5b8ebc
|
Attempt to get close on index + base addresses.
|
2023-09-17 17:05:19 -04:00 |
|
Thomas Harte
|
f039d44ee3
|
Fully handle rm = 6, mod = 0.
|
2023-09-15 22:08:20 -04:00 |
|
Thomas Harte
|
7ee5adc481
|
Forcing a displacement upon BP reduces to 29 failures.
(At the current limited fidelity of testing)
|
2023-09-15 16:09:04 -04:00 |
|
Thomas Harte
|
a5038259bc
|
Add admission.
|
2023-08-21 19:30:34 -04:00 |
|
Thomas Harte
|
bb84a5a474
|
Enable various ADB-controller interrupts.
|
2023-08-21 15:35:13 -04:00 |
|
Thomas Harte
|
3e09afbb59
|
Remove errant square bracket.
|
2023-06-21 11:57:09 -04:00 |
|
Thomas Harte
|
8578dfbf22
|
Eliminate various other errant spaces.
|
2023-05-16 16:40:09 -04:00 |
|
Thomas Harte
|
50343dec43
|
Eliminate all whitespace-only lines.
|
2023-05-12 14:16:39 -04:00 |
|
Thomas Harte
|
28c79b2885
|
Eliminate redundant [space][tab] pairs.
|
2023-05-12 14:14:45 -04:00 |
|
Thomas Harte
|
60bec3d4c0
|
Eliminate trailing whitespace, fix tabs.
|
2023-05-12 14:03:38 -04:00 |
|
Thomas Harte
|
2b56b7be0d
|
Simplify namespace syntax.
|
2023-05-10 16:02:18 -05:00 |
|
Thomas Harte
|
315e0b4545
|
Add experimental 6809 opcode decoder.
Just a pleasant distraction, for now.
|
2023-03-17 21:20:35 -04:00 |
|
Thomas Harte
|
8808014a85
|
Add AddressingMode::ExtensionWord to the executor.
|
2022-12-19 11:07:58 -05:00 |
|
Thomas Harte
|
6832cbeb31
|
Attempt fully to tie together 68020+ addressing.
|
2022-12-19 10:38:51 -05:00 |
|
Thomas Harte
|
08b3c42a5c
|
Edge further towards supporting full extension words.
|
2022-12-10 16:22:16 -05:00 |
|
Thomas Harte
|
95c526d957
|
Start arrangements for full extension words.
|
2022-11-30 16:21:35 -05:00 |
|
Thomas Harte
|
5813e2b6c6
|
Round out the list of operand flags.
|
2022-11-14 15:58:58 -05:00 |
|
Thomas Harte
|
ccadf69630
|
Add test of operand_flags and operand_size ; add entries for missing 68000 and 68010 instructions.
|
2022-10-31 15:15:05 -04:00 |
|
Thomas Harte
|
bbd2cd47ea
|
Decode [MUL/DIV][U/S].l.
|
2022-10-30 11:32:36 -04:00 |
|
Thomas Harte
|
63ad2e8263
|
Decode EXTB.l.
|
2022-10-30 11:20:43 -04:00 |
|
Thomas Harte
|
255d2f3486
|
Attempt LINK.l and CHK.l.
|
2022-10-29 21:42:53 -04:00 |
|
Thomas Harte
|
6ad1d74ddd
|
Parse and record duality of CHK2/CMP2.
|
2022-10-29 21:32:48 -04:00 |
|
Thomas Harte
|
12ca79e645
|
Decode CAS2.
|
2022-10-28 14:02:49 -04:00 |
|
Thomas Harte
|
85df54ee7d
|
Decode CAS.
|
2022-10-28 13:57:00 -04:00 |
|
Thomas Harte
|
8a8c044976
|
Support up to 15 extension words on a Preinstruction; use that to describe PACK/UNPK.
TODO: reconcile when to use that field versus the ExtensionWord operand. Probably only when operands are full?
|
2022-10-28 13:36:40 -04:00 |
|
Thomas Harte
|
f6a72dc2b4
|
Switch BFEXTU and BFFFO.
|
2022-10-27 12:13:13 -04:00 |
|
Thomas Harte
|
7d82b2ad12
|
Fix PACK operation code.
|
2022-10-27 10:52:07 -04:00 |
|
Thomas Harte
|
c2b8cbfefc
|
Add text conversions.
|
2022-10-27 10:12:52 -04:00 |
|
Thomas Harte
|
53140c016e
|
Disable bitcodes for operations that aren't otherwise yet present.
|
2022-10-27 10:09:16 -04:00 |
|
Thomas Harte
|
3f80df1feb
|
Additional TST modes become available on the 68020.
|
2022-10-27 09:49:20 -04:00 |
|
Thomas Harte
|
cabf1a052c
|
Fill in operand sizes and flags for the 68010 extensions.
|
2022-10-27 09:39:00 -04:00 |
|
Thomas Harte
|
8ff9f27b91
|
Decode MOVES.
|
2022-10-26 13:34:01 -04:00 |
|
Thomas Harte
|
ae2419e283
|
Decode MOVEC.
|
2022-10-26 12:50:15 -04:00 |
|
Thomas Harte
|
c1f0eed0a3
|
Decode MOVE from CCR.
|
2022-10-26 12:39:40 -04:00 |
|
Thomas Harte
|
4e5a80e23a
|
Fix model tests.
|
2022-10-25 22:36:00 -04:00 |
|
Thomas Harte
|
46fee9c53a
|
Add BKPT and RTD.
|
2022-10-25 22:35:44 -04:00 |
|
Thomas Harte
|
7ba6c78d14
|
MOVE from CCR, MOVEC and MOVES are on the 68010.
|
2022-10-25 21:27:23 -04:00 |
|
Thomas Harte
|
83b9fc3318
|
Declare TRAPcc operand size.
|
2022-10-25 12:20:40 -04:00 |
|
Thomas Harte
|
1ceabb30b0
|
Fully decode TRAPcc.
|
2022-10-25 12:19:03 -04:00 |
|
Thomas Harte
|
f8cb3ca8b5
|
Resolve transient GCC warning.
|
2022-10-25 10:20:06 -04:00 |
|
Thomas Harte
|
d8a11eaba7
|
Avoid explicit specialisation in non-namespace scope.
|
2022-10-25 10:13:12 -04:00 |
|
Thomas Harte
|
ab37b00356
|
Add model constraint to DIVS.l.
|
2022-10-25 10:04:36 -04:00 |
|
Thomas Harte
|
b4fcf92a62
|
Output extension words as if immediates.
|
2022-10-25 09:58:01 -04:00 |
|
Thomas Harte
|
38c531fd5a
|
Accept that a uint8_t isn't always going to be large enough; split decoding by minimum processor.
|
2022-10-25 09:50:19 -04:00 |
|
Thomas Harte
|
8c670d2105
|
Add decodes for TRAPcc and PACK, discovering it's three operand (sort of).
|
2022-10-23 11:46:47 -04:00 |
|
Thomas Harte
|
9a56d053f8
|
Introduce/extend 68k enums to cover 68020 instruction set.
|
2022-10-22 15:20:30 -04:00 |
|
Thomas Harte
|
cb0e259339
|
Start the process of decoding 68020 operations.
|
2022-10-21 15:28:29 -04:00 |
|
Thomas Harte
|
ec728ad573
|
Fix ADD/SUBX carry.
|
2022-10-19 22:17:51 -04:00 |
|
Thomas Harte
|
bc9ddacb8d
|
Improve commentary.
|
2022-10-19 14:40:29 -04:00 |
|
Thomas Harte
|
979bf42541
|
Fix ASL overflow test.
|
2022-10-18 22:43:17 -04:00 |
|
Thomas Harte
|
d09473b66f
|
Move common negative and zero logic into Status.
|
2022-10-18 14:51:51 -04:00 |
|
Thomas Harte
|
b31b4a5d10
|
Reformulate NOT in terms of EOR, and clean up elsewhere.
|
2022-10-18 12:17:55 -04:00 |
|
Thomas Harte
|
5560a0ed39
|
Fix overflow test for ASL.
|
2022-10-18 11:47:36 -04:00 |
|
Thomas Harte
|
a1ae7c28b2
|
Add various insurances against undefined behaviour.
|
2022-10-18 11:30:40 -04:00 |
|
Thomas Harte
|
fb2b7969a2
|
Add TODO to self on undefined behaviour.
|
2022-10-17 23:14:14 -04:00 |
|
Thomas Harte
|
abb19e6670
|
Populate carry whenever count != 0, regardless of modulo.
|
2022-10-17 22:57:21 -04:00 |
|
Thomas Harte
|
555250dbd9
|
Don't trample on X before use.
|
2022-10-17 22:19:35 -04:00 |
|
Thomas Harte
|
8148397f62
|
Fill in comments, eliminate u/s_extend16 macros.
|
2022-10-17 15:37:13 -04:00 |
|
Thomas Harte
|
f095bba1ca
|
Eliminate bitwise macros.
|
2022-10-17 15:21:54 -04:00 |
|
Thomas Harte
|
ee3a3df0b5
|
Eliminate SBCD macro.
|
2022-10-17 15:12:38 -04:00 |
|
Thomas Harte
|
aff1caed15
|
Clean up formatting.
|
2022-10-17 15:05:23 -04:00 |
|
Thomas Harte
|
da03cd58c1
|
Add overt casting.
|
2022-10-17 15:04:28 -04:00 |
|
Thomas Harte
|
ce98ca4bdd
|
Pull RO[L/R][X]m out of their macro stupor.
|
2022-10-17 11:27:04 -04:00 |
|
Thomas Harte
|
cc55f0586d
|
Clean up ASL/ASR/LSL/LSRm.
|
2022-10-17 11:18:10 -04:00 |
|
Thomas Harte
|
47e8f3c0f1
|
Collapse [A/L]S[L/R].[bwl] into a template.
|
2022-10-16 22:21:20 -04:00 |
|
Thomas Harte
|
d5ceb934d2
|
Fix overflow flags, avoid bigger-word usage.
|
2022-10-16 21:52:00 -04:00 |
|
Thomas Harte
|
17c1e51231
|
Commute ROL/ROR to templates.
|
2022-10-16 12:19:09 -04:00 |
|
Thomas Harte
|
fee072b404
|
Commute ROXL and ROXR into a template.
|
2022-10-16 12:06:28 -04:00 |
|
Thomas Harte
|
0a9c392371
|
Remove unused bit_count .
|
2022-10-13 15:01:06 -04:00 |
|
Thomas Harte
|
06dbb7167b
|
Unify TST.
|
2022-10-11 21:31:14 -04:00 |
|
Thomas Harte
|
eff9a09b9f
|
Collapse MOVE and NEG[X] similarities.
|
2022-10-11 21:27:18 -04:00 |
|
Thomas Harte
|
1f19141746
|
Eliminate BiggerInt .
|
2022-10-11 16:19:47 -04:00 |
|
Thomas Harte
|
28093196b9
|
Convert DIVU/DIVS logic to a template.
|
2022-10-11 16:16:53 -04:00 |
|
Thomas Harte
|
eb206a08d9
|
Templatise MULU/MULS.
|
2022-10-11 16:02:20 -04:00 |
|
Thomas Harte
|
b2f005da1b
|
Collapse SR/CCR bitwise operations into a template.
|
2022-10-11 15:53:11 -04:00 |
|
Thomas Harte
|
8305a3b46a
|
Consolidate compare logic.
|
2022-10-11 12:57:02 -04:00 |
|
Thomas Harte
|
f3f23f90a3
|
Consolidate repetition in CLR.
|
2022-10-11 11:22:34 -04:00 |
|
Thomas Harte
|
77bc60bf86
|
Consolidate BCLR, BCHG and BSET into a macro.
|
2022-10-11 10:47:55 -04:00 |
|
Thomas Harte
|
ec5d57fefe
|
Eliminate 64-bit work.
|
2022-10-11 10:33:28 -04:00 |
|
Thomas Harte
|
58396f0c52
|
Perform a prima facie conversion of ADD/SUB[/X] from macros to templates.
|
2022-10-10 22:21:13 -04:00 |
|
Thomas Harte
|
451b730c8e
|
Avoid returning without value in release builds.
|
2022-09-09 16:48:12 -04:00 |
|
Thomas Harte
|
72b6ab4389
|
Provide a route to operation that factors in addressing mode.
|
2022-09-06 11:26:16 -04:00 |
|
Thomas Harte
|
effe8c102d
|
Provide a direct to_string on Operation .
|
2022-09-05 21:52:20 -04:00 |
|
Thomas Harte
|
b6f45d9a90
|
Fix struct/class confusion.
|
2022-08-10 15:40:46 -04:00 |
|
Thomas Harte
|
8ada73b283
|
Use the outer switch for addressing mode dispatch, saving a lot of syntax.
|
2022-06-13 08:57:49 -04:00 |
|
Thomas Harte
|
71e38a6781
|
Fix decoding of RESET.
|
2022-06-03 11:15:50 -04:00 |
|
Thomas Harte
|
02b6ea6c46
|
Factor out would-accept-interrupt test, per uncertainty re: level 7.
|
2022-06-03 08:31:56 -04:00 |
|
Thomas Harte
|
c3b436fe96
|
Use int64_t as an intermediary to avoid x86 exception on INT_MIN/-1.
|
2022-06-02 21:39:52 -04:00 |
|
Thomas Harte
|
659e4f6987
|
Include fixed cost of rolls. Which includes providing slightly more information to did_shift .
|
2022-06-01 20:30:51 -04:00 |
|
Thomas Harte
|
75e85b80aa
|
Factor out the common stuff of exception state.
|
2022-06-01 08:20:33 -04:00 |
|
Thomas Harte
|
73815ba1dd
|
No need for this hoop jumping here.
|
2022-06-01 08:20:06 -04:00 |
|
Thomas Harte
|
8ffaf1a8e4
|
Ensure did_divu/s are performed even upon divide by zero.
|
2022-05-29 21:18:19 -04:00 |
|
Thomas Harte
|
7788a109b0
|
Tweak more overtly to avoid divide by zero.
|
2022-05-29 20:51:50 -04:00 |
|
Thomas Harte
|
3ef53315a2
|
Don't try to append operands to 'None'.
|
2022-05-29 15:28:16 -04:00 |
|
Thomas Harte
|
3da720c789
|
Make requires_supervisor explicitly compile-time usable.
|
2022-05-29 14:55:24 -04:00 |
|
Thomas Harte
|
c97245e626
|
Fix CalcEA timing; make MOVEfromSR a read-modify-write.
|
2022-05-27 10:32:28 -04:00 |
|
Thomas Harte
|
463fbb07f9
|
Adapt remaining 68000 tests to use Mk2.
|
2022-05-25 10:55:17 -04:00 |
|
Thomas Harte
|
9e3c2b68d7
|
Eliminate potential future implicit conversion warnings.
|
2022-05-24 11:05:24 -04:00 |
|
Thomas Harte
|
3349bcaaed
|
Attempt interrupt support.
|
2022-05-24 10:53:59 -04:00 |
|
Thomas Harte
|
6a442e0136
|
MOVEM has an immediate first operand.
|
2022-05-20 20:34:51 -04:00 |
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Thomas Harte
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cb77519af8
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Make BSR operate like the other offsets: the flow controller gets whatever was in the opcode.
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2022-05-20 12:40:09 -04:00 |
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Thomas Harte
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ba8592ceae
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At least on the 68000, Scc is read-modify-write.
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2022-05-20 11:43:26 -04:00 |
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Thomas Harte
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452dd3ccfd
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Add a performer call-out for Scc; use it to implement proper timing in the mk2 68000.
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2022-05-20 11:20:23 -04:00 |
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Thomas Harte
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eeb6a088b8
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Add a tag to avoid duplication.
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2022-05-19 15:49:42 -04:00 |
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Thomas Harte
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e4c0a89889
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Just use the four-bit register number directly.
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2022-05-19 15:01:09 -04:00 |
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