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mirror of https://github.com/TomHarte/CLK.git synced 2024-08-22 11:29:03 +00:00
Commit Graph

9 Commits

Author SHA1 Message Date
Thomas Harte
fd2c5b6679 Make a quick first attempt at memory accesses. 2024-02-29 10:18:09 -05:00
Thomas Harte
3b320bcdef Update coprocessor interface. 2024-02-28 14:43:31 -05:00
Thomas Harte
3368bdb99f Document exceptions, partly for my future self. 2024-02-28 14:34:31 -05:00
Thomas Harte
4d400c3cb7 Add easy exceptions. 2024-02-28 14:25:12 -05:00
Thomas Harte
474f9da3c2 Add banked registers. 2024-02-28 14:09:05 -05:00
Thomas Harte
60d1b36e9a Implement registers side. 2024-02-28 10:25:14 -05:00
Thomas Harte
5a48c15e46 Add scheduler side of PC writeback. 2024-02-28 10:15:23 -05:00
Thomas Harte
d6bf1808f9 Take a swing at PC-as-input. 2024-02-28 09:33:05 -05:00
Thomas Harte
b676153d21 State intention to merge status with other registers. 2024-02-27 15:36:34 -05:00