Thomas Harte
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b57a2bfec9
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Completes logic for pixel framing. Well, mostly; this doesn't yet allow for auxiliary-using II modes being off to the left.
The perceived effect though is that a frame appears and then freezes. So a clocking issue may still be afoot.
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2020-11-07 22:23:48 -05:00 |
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Thomas Harte
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a51f4122f0
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Attempts to respect border colour.
Though for now my display is just a sea of purple.
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2020-11-07 22:03:05 -05:00 |
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Thomas Harte
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35ba5fc894
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Resolves video timing issues.
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2020-11-07 21:28:08 -05:00 |
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Thomas Harte
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228d901253
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Attempts to stabilise image horizontally.
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2020-11-07 21:10:05 -05:00 |
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Thomas Harte
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d37ba62343
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Makes first, faltering steps towards video display.
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2020-11-07 20:42:34 -05:00 |
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Thomas Harte
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699fb0aa4b
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Switches to just-in-time video, for easy access to a clock divider.
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2020-11-07 19:40:26 -05:00 |
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Thomas Harte
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613d4b7c8b
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Migrates character ROM handling; supplies one for the IIgs.
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2020-11-07 17:45:03 -05:00 |
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Thomas Harte
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6b29e1f598
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Corrects accesses to switch values.
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2020-11-05 21:25:06 -05:00 |
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Thomas Harte
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6c9edbb7a2
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Resolves specious interrupts.dic
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2020-11-05 20:51:00 -05:00 |
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Thomas Harte
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282d0f1ebb
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For debugging, adds a dump of anything in the [presumably] text buffer.
Nothing is there.
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2020-11-05 18:17:21 -05:00 |
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Thomas Harte
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f466cbadec
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Attempts to do just enough with video to get a functioning vertical blank query.
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2020-11-05 17:56:20 -05:00 |
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Thomas Harte
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46ee98639e
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Stubs in $c010.
Also reduces memory map logging.
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2020-11-04 21:35:11 -05:00 |
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Thomas Harte
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cc6c0d535c
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Stubs in some of the sound GLU registers.
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2020-11-04 21:29:44 -05:00 |
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Thomas Harte
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78b57e73d5
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Hacks in a lying vertical blank value.
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2020-11-04 21:18:27 -05:00 |
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Thomas Harte
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9e2a6526d1
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Corrects interpretation of bit 3 of the state register.
And attempts to be a bit more careful with the language card in general.
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2020-11-04 21:15:10 -05:00 |
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Thomas Harte
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d3c7253981
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Shifts size-limiting of X and Y to transitions and mutations, away from reads.
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
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2020-11-04 20:35:41 -05:00 |
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Thomas Harte
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0178aaee2b
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Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
(Rather than a preserved but ignored top byte)
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2020-11-02 18:55:28 -05:00 |
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Thomas Harte
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53f60f7c87
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Adds some notes for a pending ADB implementation.
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2020-11-01 14:49:04 -05:00 |
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Thomas Harte
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2da71acefd
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Stubs in the ADB GLU.
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2020-10-31 21:00:15 -04:00 |
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Thomas Harte
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45f5896b76
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Stubs video switches into the IIgs.
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2020-10-31 20:39:32 -04:00 |
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Thomas Harte
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531a3bb7e6
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Ensures RAM is zero-initialised, for now, to aid in repeatable bug finding.
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2020-10-31 20:03:23 -04:00 |
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Thomas Harte
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e4459b6256
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Adds power-on bit to speed register.
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2020-10-30 21:50:39 -04:00 |
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Thomas Harte
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2be817a6a1
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Maps in "the interrupt ROM addresses".
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2020-10-30 21:42:43 -04:00 |
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Thomas Harte
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a833bb892b
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Increases logging substantially.
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2020-10-30 20:11:55 -04:00 |
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Thomas Harte
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0d562699a2
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Ensures unmapped regions are really unmapped.
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2020-10-29 22:18:01 -04:00 |
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Thomas Harte
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034056d0cd
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Adds full 8-bit clock addressing; stubs clock into the IIgs.
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2020-10-29 21:38:36 -04:00 |
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Thomas Harte
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5a8b8478d2
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Corrects unhandled IO assert.
The IIgs proper is actually waiting on communication with the RTC.
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2020-10-28 22:14:02 -04:00 |
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Thomas Harte
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6c54699c44
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Connects up an SCC.
Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
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2020-10-28 22:07:34 -04:00 |
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Thomas Harte
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94a6da6b7d
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Exposes much of the auxiliary and language card stuff to the IIgs bus.
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2020-10-28 21:58:20 -04:00 |
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Thomas Harte
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885fae1534
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Stubs in a speed register.
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2020-10-28 21:23:45 -04:00 |
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Thomas Harte
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1e4679ae14
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Corrects JSL and RTL.
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2020-10-28 17:25:40 -04:00 |
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Thomas Harte
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267dd59a59
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Gets as far as seemingly yet another memory-map setting.
Tomorrow, maybe?
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2020-10-27 22:31:58 -04:00 |
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Thomas Harte
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0a91ac5af5
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Adds some extra notes, starts getting into trying to run the IIgs.
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2020-10-27 22:09:45 -04:00 |
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Thomas Harte
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ad93ad6018
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Attempts to finish off shadowing.
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2020-10-27 22:05:04 -04:00 |
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Thomas Harte
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0c700094ea
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Goes branchless on shadowing.
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2020-10-27 21:56:03 -04:00 |
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Thomas Harte
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20631a157b
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Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage.
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2020-10-27 21:37:39 -04:00 |
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Thomas Harte
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e44f95a882
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Takes a first, faltering shot at shadowing.
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2020-10-27 19:49:47 -04:00 |
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Thomas Harte
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31cd45f8b5
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Takes a run at set_card_paging and simplifies method of shadowing.
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2020-10-27 19:33:47 -04:00 |
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Thomas Harte
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74f9f6ad3b
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Tests and corrects ROM access beyond bank $00.
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2020-10-27 19:02:15 -04:00 |
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Thomas Harte
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1dfdb51e61
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Hits a few other easy cases.
Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
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2020-10-26 21:49:47 -04:00 |
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Thomas Harte
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18832dc19d
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Attempts to expand the language card stuff to all affected pages.
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2020-10-26 20:30:41 -04:00 |
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Thomas Harte
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3dee0666cb
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Corrects current bank $00 language card behaviour.
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2020-10-26 17:46:40 -04:00 |
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Thomas Harte
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f830f6a57a
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Adds failing test of initial ROM mirroring.
It's the end of the evening, so this is it for today.
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2020-10-25 22:13:54 -04:00 |
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Thomas Harte
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82c733c68c
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Adds some very basic actual tests.
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2020-10-25 21:40:50 -04:00 |
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Thomas Harte
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ed510409c4
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Starts memory map test class, already finding a typo.
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2020-10-25 21:31:21 -04:00 |
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Thomas Harte
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7614eba4bf
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Factors out the IIgs memory map logic.
As testing would be rational.
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2020-10-25 21:10:04 -04:00 |
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Thomas Harte
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13c8032465
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ROM isn't writeable. The clue is in the name.
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2020-10-25 18:29:17 -04:00 |
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Thomas Harte
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44fc08cd5b
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Switches to a mapping system that supports non-continuous regions, and is smaller.
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2020-10-25 18:28:32 -04:00 |
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Thomas Harte
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ddd84db510
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Edges towards a functioning IIgs memory map.
Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
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2020-10-23 19:41:10 -04:00 |
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Thomas Harte
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817f93a490
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Edges towards a working memory subsystem. At least structurally.
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2020-10-22 19:25:04 -04:00 |
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