Thomas Harte
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b730ac5d5a
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Reintroduces 1-second disable implementation.
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2019-07-11 23:02:47 -04:00 |
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Thomas Harte
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c8917e677b
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Edging towards implementing IWM write support, but mainly tidied up.
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2019-07-11 21:42:34 -04:00 |
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Thomas Harte
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cac97a9663
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Devolves drive responsibility.
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2019-07-10 22:39:56 -04:00 |
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Thomas Harte
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be251d6b03
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Begins substituting the DoubleDensityDrive for the Sony.
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2019-07-10 16:24:48 -04:00 |
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Thomas Harte
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6cfaf920ee
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Added attribution and commentary on rotation speeds.
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2019-07-10 16:22:06 -04:00 |
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Thomas Harte
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1657f8768c
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Transfers and slightly extends drive logic into the drive.
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2019-07-10 16:17:51 -04:00 |
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Thomas Harte
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c4ab0bb867
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Starts sketching out an interface for IWM drives, eliminating a dangling use of unsigned as it goes.
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2019-07-10 16:05:59 -04:00 |
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Thomas Harte
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fb6da1de4a
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Reduces logging temporarily.
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2019-07-08 17:37:15 -04:00 |
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Thomas Harte
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245e27c893
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Solidifies belief that the shift register bit is cleared on read/write.
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2019-07-08 16:45:15 -04:00 |
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Thomas Harte
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28de629c08
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Fixes the 6522 sufficiently to fix keyboard input.
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2019-07-08 15:29:34 -04:00 |
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Thomas Harte
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210bcaa56d
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Introduces an initial shift unit test, and makes it pass.
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2019-07-07 22:13:36 -04:00 |
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Thomas Harte
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191a7a9386
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Reintroduces an empty second drive.
This prevents the uninitialised disk error. Which is a clue.
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2019-07-02 16:59:00 -04:00 |
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Thomas Harte
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b9c2c42bc0
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Switches drives to using floats for time counting.
Hopefully to eliminate a lot of unnecessary `Time` work; inaccuracies should still be within tolerable range.
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2019-07-02 15:43:03 -04:00 |
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Thomas Harte
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6c588a1510
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Makes some further random swings at tracking the startup procedure.
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2019-06-28 13:03:47 -04:00 |
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Thomas Harte
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00c32e4b59
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Further miscellaneous changes to debug logging. All temporary.
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2019-06-18 10:34:31 -04:00 |
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Thomas Harte
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877b46d2c1
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Advances IWM/drive emulation very close to the point of 'Welcome to Macintosh'.
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2019-06-15 16:08:54 -04:00 |
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Thomas Harte
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cc7226ae9f
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Starts trying to get a bit more rigorous about collected meanings.
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2019-06-13 22:48:10 -04:00 |
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Thomas Harte
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bde975a3b9
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Possibly mights the tiniest bit of headway with 'the IWM'.
I'm now pretty sure that my 3.5" drive, which for now is implemented in the IWM (yuck) is just responding to queries incorrectly.
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2019-06-13 22:38:09 -04:00 |
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Thomas Harte
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f6f9024631
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Corrects Macintosh aspect ratio (and framing).
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2019-06-13 18:41:38 -04:00 |
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Thomas Harte
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535747e3f2
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Restores single-line logging format.
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2019-06-13 13:35:03 -04:00 |
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Thomas Harte
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d6150645c0
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By hook or by crook, mouse input now works.
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2019-06-12 22:19:25 -04:00 |
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Thomas Harte
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ccd2cb44a2
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Fills in enough of the SCC to allow completion of the Macintosh side of that relationship.
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2019-06-12 17:51:50 -04:00 |
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Thomas Harte
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ad8b68c998
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Switches to a proper form of zero-upon-read data.
Not that it's necessarily correct.
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2019-06-11 19:53:51 -04:00 |
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Thomas Harte
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3c075e9542
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Switches drives 0 and 1.
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2019-06-10 14:58:39 -04:00 |
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Thomas Harte
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9230969f43
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Corrects enough of the 6522 and Keyboard to get an initial command seemingly working.
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2019-06-10 09:28:27 -04:00 |
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Thomas Harte
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0e16c67805
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Improves shift register connection, towards having the keyboard function properly.
It now seems not to receive a command terminator, but is at least getting a command.
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2019-06-08 23:04:55 -04:00 |
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Thomas Harte
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697e094a4e
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Sketches out the absolute basics of an SCC interface.
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2019-06-08 18:47:11 -04:00 |
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Thomas Harte
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50d37798a2
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Eradicates magic constants.
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2019-06-06 21:37:43 -04:00 |
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Thomas Harte
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e9d0676e75
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Fiddles further with the tachometer.
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2019-06-06 21:36:19 -04:00 |
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Thomas Harte
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7591906777
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Numerous IWM fixes: the machine now seems to be trying to measure the tachometer.
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2019-06-06 18:32:11 -04:00 |
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Thomas Harte
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a413ae11cb
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Makes some sort of first attempt at having the IWM read.
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2019-06-04 22:13:00 -04:00 |
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Thomas Harte
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b8a1553368
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Adds putative support for PlusToo-style BIN files.
Albeit a bit of a guess, since it's not intended to be an emulator file format.
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2019-06-04 21:41:09 -04:00 |
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Thomas Harte
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8557558bd8
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Mildly improves investigatory reporting.
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2019-06-03 21:51:45 -04:00 |
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Thomas Harte
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abe55fe950
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Adds Timer 1 toggling of PB7.
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2019-06-03 15:39:20 -04:00 |
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Thomas Harte
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da2b190288
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Stores expected bit length.
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2019-06-01 19:08:29 -04:00 |
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Thomas Harte
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48d837c636
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Attempts to respond more sensibly to various queries.
Including adding a 1-second delay on motor off.
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2019-06-01 18:43:47 -04:00 |
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Thomas Harte
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723137c0d4
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With some time additions to the 6522, starts wiring in Macintosh audio.
The audio buffer is also the disk motor buffer, so this is preparatory to further disk work.
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2019-06-01 14:39:40 -04:00 |
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Thomas Harte
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4197c6f149
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Attempts to make some further semantic sense of the various IWM controls.
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2019-05-30 22:17:49 -04:00 |
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Thomas Harte
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4632be4fe5
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Wires up the final IWM signal, SEL, preparatory to an implementation.
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2019-05-30 12:08:00 -04:00 |
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Thomas Harte
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8293b18278
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Adds a TODO on what I think might be an incorrect implementation?
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2019-05-08 15:06:40 -04:00 |
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Thomas Harte
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2ba0364850
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Adds the shift register interrupt.
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2019-05-08 15:02:07 -04:00 |
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Thomas Harte
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2e7bc0b98a
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Attempts the shift register.
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2019-05-08 14:54:40 -04:00 |
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Thomas Harte
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8278809383
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Attempts to get more rigorous on communicating outward control line changes.
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2019-05-08 13:33:22 -04:00 |
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Thomas Harte
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4367459cf2
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Takes a first go at handshake and pulse modes.
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2019-05-08 12:48:29 -04:00 |
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Thomas Harte
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254132b83d
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Eliminates 6522Base in pursuit of working handshake modes.
Specifically: this means that the places from which the BusHandler may be called are more numerous.
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2019-05-08 12:35:17 -04:00 |
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Thomas Harte
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7e6d4f5a3e
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Adds emulation of the real-time clock.
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2019-05-08 00:12:19 -04:00 |
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Thomas Harte
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ce099a297a
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Eliminates RAM writes in ROM area.
I no longer think that logic is correct.
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2019-05-07 17:16:22 -04:00 |
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Thomas Harte
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96facc103a
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Adds an IWM shim and corrects graphics output.
... now that there is some.
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2019-05-05 21:55:34 -04:00 |
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Thomas Harte
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62a1d69cee
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Implements proper AY IO output behaviour.
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2019-03-05 20:20:26 -05:00 |
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Thomas Harte
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d97348dd38
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Eliminates dangling uses of printf.
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2019-03-02 18:07:05 -05:00 |
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