Thomas Harte
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f4350522bf
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Implements NBCD.
Now outstanding: 1891.
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2019-04-27 21:29:50 -04:00 |
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Thomas Harte
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e2abb66a11
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Adds missing addressing modes for ADDA and SUBA.
... reducing missing opcodes to 1941.
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2019-04-27 17:22:26 -04:00 |
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Thomas Harte
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ab5fcab9bf
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Attempts an implementation of ADDX and SUBX.
Leaving 2005 non-[A/F]-line instructions.
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2019-04-27 16:57:47 -04:00 |
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Thomas Harte
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cf547ef569
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Improves semantic communications and temporarily omits A- and F-line instructions.
So it looks like 2773 instructions left to go.
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2019-04-27 15:15:03 -04:00 |
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Thomas Harte
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e75b386f7d
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Attempts DIVU and DIVS.
Reportedly leaving 10965 operations now unimplemented.
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2019-04-26 22:22:35 -04:00 |
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Thomas Harte
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796203859f
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Implements PEA.
This decreases the unimplemented count by 28 from 11841 to 11813.
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2019-04-26 13:49:59 -04:00 |
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Thomas Harte
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40f68b70c1
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Adds quantification of reports.
Depressingly; 11,841 opcodes are still missing. Better get on with it!
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2019-04-26 13:25:34 -04:00 |
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Thomas Harte
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40b2fe7339
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Merge branch 'master' into 68000
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2019-04-26 00:02:35 -04:00 |
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Thomas Harte
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a3b6d2d16e
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Corrects test and resolves all instances of opcodes that are valid but shouldn't be.
The converse case will require implementation of the remaining instructions.
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2019-04-25 22:54:58 -04:00 |
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Thomas Harte
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3983f8303f
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Introduces failing test of 68000 opcode coverage.
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2019-04-25 22:06:05 -04:00 |
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Thomas Harte
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7cbd5e0ef6
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Imports additional files used as test cases.
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2019-04-25 21:43:47 -04:00 |
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Thomas Harte
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dab9bb6575
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Implements EXT.
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2019-04-25 18:22:19 -04:00 |
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Thomas Harte
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7df85ea695
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Cleans up and formally introduces a comparative source for QL startup.
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2019-04-25 15:42:41 -04:00 |
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Thomas Harte
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c132bda01c
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Implements MOVE from SR.
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2019-04-25 14:39:32 -04:00 |
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Thomas Harte
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4e25bcfcdc
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Corrects decoding of AND/OR x, Dn.
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2019-04-25 14:19:13 -04:00 |
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Thomas Harte
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ea463549c7
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Corrects overflow flag for LSL and LSR.
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2019-04-25 13:59:10 -04:00 |
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Thomas Harte
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723acb31b3
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Corrects various flag issues with ADD, SUB and NEG.
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2019-04-25 13:53:23 -04:00 |
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Thomas Harte
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5725db9234
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Corrects calculated-address TAS.
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2019-04-25 12:42:05 -04:00 |
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Thomas Harte
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8557e563bc
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Takes a run at TAS, clarifying bus cycles.
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2019-04-25 12:19:40 -04:00 |
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Thomas Harte
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d2491633ce
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Ensures MOVEM to M .w correctly updates A7.
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2019-04-24 23:21:15 -04:00 |
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Thomas Harte
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002796e5f5
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Takes a run at BSET and BCHG.
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2019-04-24 23:01:32 -04:00 |
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Thomas Harte
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fa0accf251
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Attempts to correct flags for ASL, ASR, LSL, LSR.
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2019-04-24 21:04:47 -04:00 |
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Thomas Harte
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dcb8176d90
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Corrects potential failure properly to set stack pointer state.
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2019-04-24 17:58:27 -04:00 |
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Thomas Harte
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be32b1a198
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Fixes JSR (An) return address [again].
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2019-04-24 17:50:38 -04:00 |
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Thomas Harte
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582e4acc11
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Implements ANDI/ORI/EOR to SR/CCR.
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2019-04-24 17:38:59 -04:00 |
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Thomas Harte
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10f75acf71
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Causes EXG to function.
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2019-04-24 16:32:16 -04:00 |
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Thomas Harte
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b9933f512f
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Fixed: the word/long-word bit works the other way around.
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2019-04-24 16:30:15 -04:00 |
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Thomas Harte
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75a7f7ab22
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Inserts missing program fetch for CMPI.bw #, (d8/16...).
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2019-04-24 14:45:24 -04:00 |
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Thomas Harte
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757be2906e
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Merge pull request #620 from rzumer/fix_typos
Correct typos in Z80.hpp
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2019-04-24 13:25:06 -04:00 |
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Thomas Harte
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e214584c76
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SWAP should clear overflow and carry.
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2019-04-24 13:19:56 -04:00 |
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Thomas Harte
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0bb6b498ce
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Simplifies and fixes post-inc MOVE behaviour.
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2019-04-24 13:14:25 -04:00 |
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Thomas Harte
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958d44a20d
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Causes SWAP actually to perform.
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2019-04-24 13:06:12 -04:00 |
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Thomas Harte
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bb9424d944
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Corrects byte increment/decrement actions for A7.
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2019-04-24 13:01:08 -04:00 |
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Thomas Harte
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11bf706aa2
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Attempts to fix LT and LTE conditions.
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2019-04-24 10:07:17 -04:00 |
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Thomas Harte
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033b8e6b36
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ADD/SUBQ #, An shouldn't set flags.
Also, temporarily at least, adds a new means for observing CPU behaviour.
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2019-04-24 09:59:54 -04:00 |
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Thomas Harte
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7c3ea7b2ea
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Resolves additional byte accesses being signalled as word.
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2019-04-23 21:23:20 -04:00 |
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Thomas Harte
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a08043ae88
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Ensures that MOVE.b #, (xxx).l writes only a byte.
Also rearranges some of the temporary logging functionality.
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2019-04-23 19:01:58 -04:00 |
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Thomas Harte
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7c132a3ed5
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Ensures 16-bit values of Xn for (d8, An, Xn) are sign extended.
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2019-04-22 22:13:02 -04:00 |
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Thomas Harte
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20e774be1e
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Corrects return address of JSR (An).
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2019-04-22 21:11:49 -04:00 |
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Thomas Harte
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6d6046757d
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Fixes predecrementing MOVEM to leave the proper address in the relevant register.
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2019-04-22 15:41:09 -04:00 |
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Thomas Harte
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55073b0a52
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Corrects a bunch of MOVEs to (d8/16, PC/An, [Xn]).
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2019-04-21 22:55:23 -04:00 |
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Thomas Harte
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44eb4e51ed
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Ensures DBcc properly signals program fetches.
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2019-04-21 22:54:20 -04:00 |
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Thomas Harte
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3cb042a49d
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Corrects the carry and extend flags for various long-word operations.
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2019-04-21 22:08:18 -04:00 |
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Thomas Harte
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b78ea7d24c
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Further simplifies CMPA.
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2019-04-20 21:23:36 -04:00 |
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Thomas Harte
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c66728dce2
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Corrects decoding of CMPA.
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2019-04-20 21:21:33 -04:00 |
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Thomas Harte
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0be9a0cb88
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Corrects Scc (and other conditionals) for complex addressing modes.
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2019-04-20 18:35:19 -04:00 |
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Thomas Harte
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a90f12dab7
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Corrects return address for TRAP.
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2019-04-20 15:49:32 -04:00 |
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Thomas Harte
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ef33b004f9
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Corrects word access order of MOVEM.l.
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2019-04-20 15:13:12 -04:00 |
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Thomas Harte
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2cac4b0d74
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Corrects EA usage for ADDA and SUBA.
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2019-04-19 23:02:41 -04:00 |
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Thomas Harte
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a49f516265
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Corrects direction of MOVE [to/from] USP.
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2019-04-19 22:41:06 -04:00 |
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