Thomas Harte
863971f944
68000: fix E alignment, expand Microcycle::apply.
2021-09-08 21:03:37 -04:00
Thomas Harte
402f2ddbd9
Increases likelihood of 68000 Program offset-size assumptions being met.
2020-07-02 22:24:04 -04:00
Thomas Harte
6e4b8d58a5
Completes [[fallthrough]]s.
2020-06-19 23:50:37 -04:00
Thomas Harte
945a9da94f
Adds further [[fallthrough]]s.
2020-06-19 23:44:20 -04:00
Thomas Harte
73131735fa
Further qmake warning corrections.
2020-05-30 19:31:17 -04:00
Thomas Harte
267006782f
Starts to add Qt target; resolves many build warnings.
2020-05-30 00:37:06 -04:00
Thomas Harte
28881cb391
Implements apply.
2020-05-19 18:27:10 -04:00
Thomas Harte
a16b710d22
Removes <cassert> from Struct.h (which means it's needed in the 68000's State).
2020-05-19 00:06:29 -04:00
Thomas Harte
a3d4c7599b
Attempts fully to capture 68000 state.
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Albeit that it can't be put back yet.
2020-05-18 23:55:54 -04:00
Thomas Harte
6f16928215
Adds all remaining simple scalar fields.
2020-05-16 22:47:04 -04:00
Thomas Harte
57edfe8751
Formalises TODO list and marches onward into execution state.
2020-05-16 18:31:43 -04:00
Thomas Harte
dcc0ee3679
Adds input line capture.
2020-05-16 17:44:15 -04:00
Thomas Harte
f7a16762b4
Starts populating the 68000 state registers.
2020-05-16 00:06:04 -04:00
Thomas Harte
8b76d4007e
Starts adding State for the 68000.
2020-05-14 22:46:40 -04:00
Thomas Harte
66c2eb0414
Further tightens const and constexpr usage.
2020-05-12 22:22:21 -04:00
Thomas Harte
dca79ea10e
Requires trace flag currently set.
2020-01-18 22:52:53 -05:00
Thomas Harte
b7fd4de32f
Ensures a one-instruction latency on the trace flag.
2020-01-18 22:06:00 -05:00
Thomas Harte
9f2f547932
Adds and satisfies test on the function code word.
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Thanks to ijor's "68000 Address and Bus Error Stack Frame" re: contents.
2020-01-04 23:58:07 -05:00
Thomas Harte
f0d5bbecf2
Introduces a test of stack contents after an address error.
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Fixes: stacked PC, address of fault.
2020-01-04 23:22:07 -05:00
Thomas Harte
a28c52c250
Fixes A7-relative JSRs.
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I completely withdraw my earlier statement re: the test cases.
2020-01-04 22:22:33 -05:00
Thomas Harte
7de1181213
Make a new guess at post-overflow DIV flags, based on tests.
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Specifically: for DIVU, stick with the current guess of a fixed set. For DIVS, leave N and Z alone.
2020-01-03 23:44:49 -05:00
Thomas Harte
c7a5b054db
There's no TODO here; overflow is always 0 for a 16x16 multiply.
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... and the original 68000 doesn't support 32x32 multiplies.
2020-01-03 22:44:19 -05:00
Thomas Harte
2f8078db22
Switches to should_log as a global when I'm hacking about.
2020-01-02 20:15:48 -05:00
Thomas Harte
5be30b1f7b
Introduces further comparative tests, prompting a new CHK fix.
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Specifically: how to set N when both is_under and is_over are true, and to eliminate a failure fully to prefetch in the longer addressing modes.
2020-01-01 19:11:36 -05:00
Thomas Harte
b184426f2b
Ensure that an interrupt from a STOP doesn't return to the STOP.
2020-01-01 14:51:47 -05:00
Thomas Harte
1de4f179c0
Adds more thorough comment on the bus program used.
2019-12-25 19:49:49 -05:00
Thomas Harte
3cb5684d95
Fixes RTR: the whole top half of the SR should be preserved.
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Specifically, the 68000 Reference Manual says: "The supervisor portion of the status register is unaffected." Clearly when I first read that I misread it as the supervisor _flag_ (rather than _portion_) should be preserved.
2019-12-25 19:49:20 -05:00
Thomas Harte
274867579b
Deploys constexpr as a stricter const.
2019-12-22 00:22:17 -05:00
Thomas Harte
cf16f41939
Makes value8_high/low and value16 branchless.
2019-12-21 20:58:37 -05:00
Thomas Harte
08f2877382
I think the 68000 actually loads a byte value onto both the upper and lower data lines.
2019-12-21 20:37:03 -05:00
Thomas Harte
a3e64cae41
Corrects SBCD carry.
2019-12-17 22:16:02 -05:00
Thomas Harte
8a2ac87209
Reverted SBCD/NBCD V behaviour.
2019-12-16 23:08:59 -05:00
Thomas Harte
096b447b4b
Corrects MOVE -(An), SR/CCR, which was not previously decrementing.
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Also adds a safety check against other instances of the same error. There seem to be none.
2019-12-16 22:38:54 -05:00
Thomas Harte
84167af54f
Corrects CHK N flag.
2019-12-16 20:01:33 -05:00
Thomas Harte
8be26502c4
Fixes NBCD -(An)+, adds some additional comments.
2019-12-16 20:01:19 -05:00
Thomas Harte
4c068e9bb8
Corrects flags on CMPA.w.
2019-12-15 20:39:47 -05:00
Thomas Harte
dc1abd874e
Corrects indentation typo.
2019-12-14 23:52:53 -05:00
Thomas Harte
4dd235f677
Adds supervisor/user to logged flags in trace mode.
2019-12-08 22:39:10 -05:00
Thomas Harte
407cc78c78
Extends to offer simpler 8-bit access handling.
2019-12-08 20:19:44 -05:00
Thomas Harte
b12136691a
Corrects comment.
2019-11-18 23:46:33 -05:00
Thomas Harte
db03b03276
Corrects [AND/OR/EOR].bw Dn, -(An) to decrement destination.
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It was previously doing a predecrement on the internal source address, which is unused. This fixes at least Dan Dare III and Silkworm.
2019-11-09 11:25:23 -05:00
Thomas Harte
6afefa107e
Resolves unused variable warning.
2019-11-05 23:18:25 -05:00
Thomas Harte
07582cee4a
BusGrant is a further signal I will need.
2019-11-03 21:10:42 -05:00
Thomas Harte
a67e0014a4
Fixes video base address and mono/colour monitor value.
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Now I see a GEM desktop. In blue.
2019-11-02 19:36:15 -04:00
Thomas Harte
c070f2100c
Attempts to regularise data bus access.
2019-11-01 23:01:06 -04:00
Thomas Harte
ecc0cea5a1
Added a potential branch for the newer TOS memory map.
2019-10-26 16:52:06 -04:00
Thomas Harte
6a80832140
Moves timing of interrupt sampling into prefetch queue advancement.
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As per comment, that is definitely the only place it can occur; I don't know whether it always occurs there.
2019-08-04 21:06:34 -04:00
Thomas Harte
35b1a55c12
Corrects DIVS negative flag.
2019-08-04 20:36:33 -04:00
Thomas Harte
e3794c0c0e
Takes a second pass at DIVS timing, seeming to correct that side of things.
2019-08-04 20:33:43 -04:00
Thomas Harte
478f2533b5
Corrects 68000 address bus during interrupt acknowledge.
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All unused bits should be 1, not 0.
2019-08-03 15:38:36 -04:00
