Thomas Harte
a1e118a1ff
Do some interrupt work.
2023-11-21 15:46:31 -05:00
Thomas Harte
83ca9b3af5
Hack in some MDA text logging. Boot seems to complete?
2023-11-21 11:37:36 -05:00
Thomas Harte
acdf32e820
Handle low/high switches.
2023-11-21 11:25:53 -05:00
Thomas Harte
931e6e7a56
Add, disable, logging detritus.
2023-11-21 11:19:47 -05:00
Thomas Harte
058080f6de
Prove to my caveman self that no text is being written.
2023-11-20 23:11:27 -05:00
Thomas Harte
c4e9f75709
Edge towards but don't quite reach interrupt.
2023-11-20 22:52:20 -05:00
Thomas Harte
695282b838
PIT output now reaches the PIC.
2023-11-20 22:36:05 -05:00
Thomas Harte
ee6012f6e9
Evict the PIT.
2023-11-20 19:00:16 -05:00
Thomas Harte
d3e90ce006
Capture some basics.
...
BIOS now seems to get as far as expecting channel 0 to trigger an interrupt, which never comes.
2023-11-20 15:36:52 -05:00
Thomas Harte
18ddc2c83a
Route traffic.
2023-11-20 15:11:22 -05:00
Thomas Harte
abf0eead7a
Add a functionless PIC.
2023-11-20 13:53:44 -05:00
Thomas Harte
a689f2b63e
Relocate comment.
2023-11-20 12:22:30 -05:00
Thomas Harte
a3066fc040
Advance to the missing PIC.
2023-11-20 12:21:37 -05:00
Thomas Harte
7eed254de9
Bring an 8255 into the mix.
2023-11-20 12:13:42 -05:00
Thomas Harte
55f466f2fa
Add enough of the DMA subsystem to trip over in PPI world.
2023-11-19 22:55:29 -05:00
Thomas Harte
119c83eb18
Fix field decoding.
2023-11-19 21:51:27 -05:00
Thomas Harte
4e077701c9
Exit without further modification upon latch.
2023-11-19 16:37:47 -05:00
Thomas Harte
a8f1c72f5c
Take a caveman run at debugging.
2023-11-19 16:05:44 -05:00
Thomas Harte
05e93f0eb3
Implementing counting for a couple of PIT modes.
2023-11-19 15:52:32 -05:00
Thomas Harte
af885ccf08
Decode PIT mode writes.
2023-11-19 15:01:21 -05:00
Thomas Harte
2b69081fff
Start sketching the PIT.
2023-11-19 07:15:30 -05:00
Thomas Harte
a91449555f
Add link for future self.
2023-11-17 17:38:17 -05:00
Thomas Harte
afc0ca3f1b
Add XT roadmap.
2023-11-17 17:35:11 -05:00
Thomas Harte
d202cfc2ca
Add TODO.
2023-11-17 17:09:20 -05:00
Thomas Harte
ec2d878e3f
End run around the template.
...
I have yet to get any insight whatsoever on the reason for GCC's failure here and won't have access to a suitable test
machine for a while so all I have for testing is the arduous CI cycle.
2023-11-17 17:02:46 -05:00
Thomas Harte
8af173c4bc
Remove hopeful hit.
2023-11-16 15:48:27 -05:00
Thomas Harte
e1541543c3
Play hit and hope.
2023-11-16 15:40:47 -05:00
Thomas Harte
99e7de5a8b
Colocate memory.
2023-11-16 15:24:35 -05:00
Thomas Harte
095359017f
Log first unhandled port.
2023-11-16 13:02:35 -05:00
Thomas Harte
25f0a373f3
Don't sign-extend ports (!).
2023-11-16 11:17:12 -05:00
Thomas Harte
832e31f7e5
Add note to self.
2023-11-16 10:34:24 -05:00
Thomas Harte
164a7fe848
Log port IO.
2023-11-16 06:48:24 -05:00
Thomas Harte
62b6219763
Install BIOS, albeit in writeable storage.
2023-11-15 22:02:53 -05:00
Thomas Harte
2bc9dfbef9
Albeit with no BIOS present, execute.
2023-11-15 16:10:37 -05:00
Thomas Harte
3b84299a05
Edge closer to PCCompatible doing _something_.
2023-11-15 15:58:49 -05:00
Thomas Harte
6f48ffba16
Add enough of a ScanProducer to run.
2023-11-15 14:30:30 -05:00
Thomas Harte
af7069ac21
Include and fetch a BIOS.
2023-11-15 11:32:23 -05:00
Thomas Harte
e927fd00d8
Do just enough to include x86 code in the main build.
2023-11-15 11:01:28 -05:00