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3023 Commits

Author SHA1 Message Date
Thomas Harte
60d3519993 Clarify, attempt to implement as internally documented. 2022-06-28 22:32:31 -04:00
Thomas Harte
6abc317986 Avoid permitting writes in the Cx00 region after uninhibiting the language card. 2022-06-28 16:35:47 -04:00
Thomas Harte
94fcc90886 Use auxiliary switches to control language card area when card is inhibited. 2022-06-28 12:46:31 -04:00
Thomas Harte
7aeaa4a485 Tweak paging semantics, to allow simple multiple dependencies. 2022-06-27 21:38:45 -04:00
Thomas Harte
ef40a81be2 Remove temporary hack. 2022-06-27 08:00:29 -04:00
Thomas Harte
21842052cf Alternative zero page should affect bank 0's language card area when the card is disabled. 2022-06-27 07:56:45 -04:00
Thomas Harte
56aa182fb6 Fix debug builds. 2022-06-06 15:26:15 -04:00
Thomas Harte
9818c7e78c Switch the Amiga to the newer 68000. 2022-06-06 11:10:56 -04:00
Thomas Harte
5495f30329 Microtweak: simplify Macintosh pixel serialisation. 2022-06-06 08:34:58 -04:00
Thomas Harte
6aa599a17c Future-proof perform_bus_operation. 2022-06-06 08:20:16 -04:00
Thomas Harte
57858b2fa5 Merge branch 'master' into InST 2022-06-05 20:59:48 -04:00
Thomas Harte
403eda7024 Add missing flush. 2022-06-05 09:08:36 -04:00
Thomas Harte
1671827d24 Add flush. 2022-06-05 09:07:43 -04:00
Thomas Harte
4a740fbd14 Switch Atari ST to using the new 68000. 2022-06-04 08:43:43 -04:00
Thomas Harte
a61f7e38b6 Very minor: avoid division and modulus when unnecessary. 2022-06-03 15:39:29 -04:00
Thomas Harte
3d059cb751 Make use of Microcycle helpers where relevant. 
None of these existed when the Macintosh was first added to this emulator.
 2022-06-03 15:33:31 -04:00
Thomas Harte
1365fca161 Avoid phoney write modifies. 2022-05-27 21:42:55 -04:00
Thomas Harte
a611a745e7 Switch the Macintosh to 68000 mk2. 2022-05-24 12:35:36 -04:00
Thomas Harte
b0518040b5 Plants the seek of a 68000 mark 2. 2022-05-16 11:44:16 -04:00
Thomas Harte
866b6c6129 Eliminate off_t. 2022-04-27 19:16:37 -04:00
Thomas Harte
efff91ea3d Undo bad guess at initial switch state. 2022-04-17 17:03:05 -04:00
Thomas Harte
290dd3993b CPC: ensure 64/128k RAM is properly selected. 2022-03-26 08:54:07 -04:00
Thomas Harte
bfd28a04ba Remove noise. 2022-03-18 10:41:20 -04:00
Thomas Harte
359ec257c0 Add a further state, seemingly to fix high-res mode. 2022-03-18 08:27:46 -04:00
Thomas Harte
88767e402c Switch DDFSTART/STOP state machine. 2022-03-17 20:03:36 -04:00
Thomas Harte
e698cbf092 Silence debugging information. 2022-03-13 12:48:05 -04:00
Thomas Harte
f2ce646d8d Undo 8-cycle-if-met WAIT. 2022-03-13 12:47:48 -04:00
Thomas Harte
acba357df6 Adds empty callouts for all serial port registers. 2021-12-23 15:22:20 -05:00
Thomas Harte
a17c192a9e Allow chip RAM size selection, while I'm here. 2021-12-22 15:30:19 -05:00
Thomas Harte
1916a9b99c Remove stdout noise. 2021-12-22 15:22:28 -05:00
Thomas Harte
9796b308dc Add basic implementation of fast RAM. 2021-12-22 15:17:11 -05:00
Thomas Harte
d0e3024bec Switch to nibble-oriented lookup tables for fill mode. 2021-12-19 17:16:46 -05:00
Thomas Harte
d2ad149e56 Fill mode always runs right to left. 2021-12-19 16:43:18 -05:00
Thomas Harte
348840a2aa It's probably a net detriment to use a template in this scenario. 2021-12-19 16:31:44 -05:00
Thomas Harte
3a719633eb Consolidate interface; correct LOGs. 2021-12-18 19:39:41 -05:00
Thomas Harte
bd69948d37 The Copper can now skip Chipset::perform. 2021-12-18 17:53:11 -05:00
Thomas Harte
54aa211f56 Avoid infinite loops for completely undefined addresses. 2021-12-18 17:48:45 -05:00
Thomas Harte
f118891970 Breaks Chipset::perform into read and write. 
This allows each to call the other when a read occurs of a write-only address, and vice versa.
 2021-12-18 17:43:53 -05:00
Thomas Harte
dbae3fc9a5 Propagate to bitplanes immediately; fix odd/even confusion. 2021-12-18 16:37:40 -05:00
Thomas Harte
c834960bfb Withdraw separate x-and-y guess, make MOVE lose a cycle if a sleep/wake occurs. 2021-12-12 19:18:18 -05:00
Thomas Harte
600abc55b5 Compare x and y separately, wake immediately from a sleep, log more. 2021-12-12 17:26:33 -05:00
Thomas Harte
f3ec7d54bb Clarifies wait-for-CPU-slot semantics. 
Big bonus: this guarantees `advance_dma`s will be called at most once per output cycle, even if they return `false`.
 2021-12-09 19:17:44 -05:00
Thomas Harte
2b0415d552 Attempt to avoid off-by-one buffer reads, add modulation. 2021-12-06 19:28:40 -05:00
Thomas Harte
066e4421e8 Attempt volcntrld. 2021-12-06 06:35:08 -05:00
Thomas Harte
f02a241249 Inserts an additional reload. 2021-12-05 17:47:12 -05:00
Thomas Harte
a5fe1e4259 Largely debugs audio state machine. 
I think I'm still missing an address reload somewhere though, and attachment doesn't actually push.
 2021-12-05 15:27:35 -05:00
Thomas Harte
9b80563443 Exposes targets for modulation. 2021-12-05 06:38:55 -05:00
Thomas Harte
91b5da06e3 Perform reload on Disabled -> WaitingForDummyDMA. 2021-12-04 19:17:40 -05:00
Thomas Harte
7320f96ae7 Capture attachment flags. 2021-12-04 18:02:43 -05:00
Thomas Harte
fdf2b9cd7b Add local data pointers. 2021-12-04 17:58:41 -05:00
Thomas Harte
bfc70a1b60 Ensure interrupt request bits always propagate. 2021-12-04 16:50:42 -05:00
Thomas Harte
aff7a93106 Move DMAFlags to Flags.hpp. 2021-12-04 08:26:28 -05:00
Thomas Harte
3b027c4593 Switch and -> or for testing transitions from ::PlayingLow. 2021-12-04 08:24:41 -05:00
Thomas Harte
42d3bdd373 Adds a begin_state template. 2021-12-04 07:20:17 -05:00
Thomas Harte
57789092c1 Keep audio fetches in bounds. 2021-12-03 07:16:21 -05:00
Thomas Harte
6bc5268cbd Reload period counter on low -> high transition. 2021-12-02 18:43:02 -05:00
Thomas Harte
e6fe36f45c Add buffer-length assert; add <tuple> where std::tuple_size is used. 2021-12-02 12:53:20 -05:00
Thomas Harte
06b6f85d55 Correct stereo. 2021-12-02 11:15:29 -05:00
Thomas Harte
d6f1ea50a6 Switch to slightly more straightforward presumption of no data wanted. 2021-12-02 09:41:16 -05:00
Thomas Harte
9554869886 Simplify DMA logic. 2021-12-02 09:33:02 -05:00
Thomas Harte
364059551c Add extra notes per errata, plus bonus state code repetitions. 2021-12-02 09:30:52 -05:00
Thomas Harte
06340b1ad7 Advance DMA pointer, treat audio as signed, request data on low -> high transition. 
There's now some audio, sometimes when there should be. But it's not correct.
 2021-12-01 18:34:54 -05:00
Thomas Harte
d23511860d Attempts audio output. 2021-12-01 06:01:58 -05:00
Thomas Harte
a8dd4660b2 Adds a pipeline for audio output. 2021-12-01 05:37:58 -05:00
Thomas Harte
eb3a0eb3c7 Attempt full implementation of collisions. 2021-11-29 18:39:33 -05:00
Thomas Harte
cd0148e0bc Switch to a default 1mb of Chip RAM. 2021-11-29 16:55:45 -05:00
Thomas Harte
8584ee609f Support a fetch window start on line 0. 2021-11-28 05:37:49 -05:00
Thomas Harte
373847e2b7 Avoid posting redundant key events. 2021-11-28 05:31:00 -05:00
Thomas Harte
84f7d8dfc2 Factors out pixel generation, adds HAM. 2021-11-28 05:06:30 -05:00
Thomas Harte
e057a7d0dd Attempts to implement sprite/playfield priorities. 2021-11-27 15:03:46 -05:00
Thomas Harte
7bab15bf99 Minor copy improvements. 2021-11-27 11:38:41 -05:00
Thomas Harte
dac40630fd Adds support for the Blitter-busy flag to WAIT and SKIP. 2021-11-27 11:36:15 -05:00
Thomas Harte
33bfa1b81c Move BitplaneShifter adjacent to expand_bitplane_byte. 2021-11-26 18:29:09 -05:00
Thomas Harte
8fc27dc292 Moves bitplane collection and shifter out of Chipset.[h/c]pp. 2021-11-26 18:16:24 -05:00
Thomas Harte
f8e8f18be5 Switch to std::clamp. 2021-11-26 18:10:29 -05:00
Thomas Harte
8b38c567d2 Add missing #include for std::clamp. 2021-11-26 18:08:39 -05:00
Thomas Harte
cd53e42d79 Resolve operator precedence. 2021-11-26 18:08:10 -05:00
Thomas Harte
bea6cf2038 Move mouse and joystick into a separate file, give a common parent. 2021-11-26 17:50:47 -05:00
Thomas Harte
eca80f1425 Sprites: avoid magic constants, ensure proper DMA resumption. 2021-11-26 16:02:18 -05:00
Thomas Harte
1c0962e53c Move sprites into their own source file. 2021-11-26 15:30:31 -05:00
Thomas Harte
4b21549ff4 Add a couple of static asserts. 2021-11-26 15:23:54 -05:00
Thomas Harte
30d7b0129b Correct sprite ordering within pairs. 2021-11-26 11:58:50 -05:00
Thomas Harte
ce6877d6e4 Sprites: infer part of DMA state from slot, no access during blank. 
Also sets the proper vertical blank length.
 2021-11-26 09:37:52 -05:00
Thomas Harte
0ab5177637 Allow DMAState::FetchStopAndControl on y == v_stop_. 2021-11-25 14:29:12 -05:00
Thomas Harte
276cbfa505 Simplify sprite state machine. 
This now better matches the explanation given on Page 133 of the Amiga System Programmer's Guide.
 2021-11-25 14:08:55 -05:00
Thomas Harte
012084b37b Fix exclusive fill, sizing, eliminate ECS call-ins. 
The clock test now proceeds further, but still doesn't seem to pass.
 2021-11-24 17:25:32 -05:00
Thomas Harte
7af5737ec5 Switch to LOG. 2021-11-24 16:15:40 -05:00
Thomas Harte
0df8173536 Merge branch 'master' into Amiga 2021-11-24 08:58:03 -05:00
Thomas Harte
f5d3d6bcea Splits the lowpass filter into push and pull variants. 2021-11-21 15:37:29 -05:00
Thomas Harte
a8a99f647f Further improves framing. 2021-11-21 08:13:55 -05:00
Thomas Harte
ff68b26c44 Push HSYNC 11 slots over, to its proper position, and add a frame crop. 2021-11-20 12:39:50 -05:00
Thomas Harte
a94b4f62fd Takes a stab at attached sprites. 2021-11-19 14:19:47 -05:00
Thomas Harte
bcc959d938 Sprites: deconflate vertical and modification flags; disarm on CTL not POS. 2021-11-19 08:03:10 -05:00
Thomas Harte
cf25d8a378 Increase logging (but leave it disabled). 2021-11-19 08:01:23 -05:00
Thomas Harte
693d46f8ea Mask by index, not colour. 2021-11-18 05:36:38 -05:00
Thomas Harte
3496ebd1d7 Constrain sprite fetches to Chip RAM. 2021-11-17 17:49:42 -05:00
Thomas Harte
be763cf7fe Expose joystick to the world. 2021-11-17 15:33:46 -05:00
Thomas Harte
c3b4bee210 Adds a joystick class. 2021-11-17 14:26:51 -05:00
Thomas Harte
6df0227ab1 Hacks in a basic effort at dual playfields. 2021-11-16 18:26:27 -05:00
Thomas Harte
2a3a7fa8a0 Reset will_request_interrupt. 2021-11-15 16:00:35 -05:00
Thomas Harte
50a6496399 Avoids over-greedy DMA. 2021-11-15 12:31:15 -05:00
Thomas Harte
c99dee86dd Adds missing low -> high actions, implements more transitions. 2021-11-15 12:29:32 -05:00
Thomas Harte
0c5bb9626b Separates state transitions and tests. 2021-11-15 05:29:28 -05:00
Thomas Harte
a9971917f5 Attempts a translation of Commodore's documentation. 2021-11-14 14:54:33 -05:00
Thomas Harte
4c62611da3 Adds enough state machine to get into the near-incomprehensible stuff on the right. 2021-11-14 10:48:50 -05:00
Thomas Harte
47f36f08fb Switches to a synchronous audio state machine; renames advance -> advance_dma. 
I can worry about how to just-in-time things once I better understand the hardware in general.
 2021-11-13 15:53:41 -05:00
Thomas Harte
f906bab1a5 Provides feedback on interrupt flags, starts on state machine. 2021-11-13 11:05:39 -05:00
Thomas Harte
fffc03c4e4 Propagates time to the audio subsystem. 2021-11-12 15:30:52 -05:00
Thomas Harte
0a94184d6b Provides a greater wealth of audio data. 2021-11-11 09:24:15 -05:00
Thomas Harte
7be3578497 Adds a target for audio writes. 2021-11-09 07:11:23 -05:00
Thomas Harte
eeaccb8ac0 Implements clear_all_keys. 2021-11-08 17:49:09 -05:00
Thomas Harte
8ef9a932aa Adds inclusive fill test; fixes inclusive fills. 2021-11-07 14:26:13 -08:00
Thomas Harte
31e22e4cfb Provides full serial input. 2021-11-07 05:19:16 -08:00
Thomas Harte
ecfe68d70f Introduce the principle that a Serial::Line can be two-wire — clock + data. 2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9 Post key actions to the nominated serial line. 
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
 2021-11-06 12:03:09 -07:00
Thomas Harte
471e13efbc Transcribes keycodes. 2021-11-04 18:54:42 -07:00
Thomas Harte
c9bf2dda16 Attempt implementation of disk sync. 2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b Relocate disk logic into a separate compilation unit. 2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511 Adds support for interlaced output. 2021-11-02 14:34:03 -07:00
Thomas Harte
d989825216 Add bonus notes on VPOSR. 2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88 Retains a little more of output controls. 2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43 Switch to using the swizzled palette for playfield output. 2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a Delay bitplane installation until end of slot. 2021-11-01 14:18:58 -07:00
Thomas Harte
4e66017205 Enable sprite reuse and toggle to inactive when visible region is over. 2021-10-31 16:52:48 -07:00
Thomas Harte
299d517449 Performs a first implementation of fill mode. 2021-10-31 14:36:31 -07:00
Thomas Harte
4c1ab6ff25 Rethinks bitplane stops. 2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a Avoid duplication of CIA select test. 2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826 VHPOSR's fields are the other way around. 2021-10-30 12:04:46 -07:00
Thomas Harte
d25804f4a2 Throws in official register names. 2021-10-29 14:05:11 -07:00
Thomas Harte
edb75e69cb Implement bitplane modulos. 2021-10-29 11:29:22 -07:00
Thomas Harte
f3e895f17c Tag intended unused parameters. 2021-10-29 06:21:02 -07:00
Thomas Harte
b952d73e83 Disallow programmatic setting of blitter status. 2021-10-29 06:19:57 -07:00
Thomas Harte
07facc0636 Takes a stab at BZERO. 2021-10-28 18:12:46 -07:00
Thomas Harte
da1a69be27 Caps mouse speed. 
Also takes another guess at CIA interrupt bits. To no avail.
 2021-10-27 18:38:02 -07:00
Thomas Harte
b10f5ab110 Apply A mask when loading into barrel shifter. 2021-10-26 20:02:28 -07:00
Thomas Harte
b4286bb42b Modulos are subtracted in descending mode. 2021-10-26 07:21:51 -07:00
Thomas Harte
139d35c6f9 Switches to basic use of sprite shifters. 2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a Starts on a two-at-a-time sprite shifter. 2021-10-25 16:30:30 -07:00
Thomas Harte
9f3efb7f05 Limits graphical output to [all but one bit] of the display window. 2021-10-25 14:12:23 -07:00
Thomas Harte
e6001e0f22 Shifts bitplanes irrespective of output window. 2021-10-25 13:59:39 -07:00
Thomas Harte
c6535bf035 Switches bitplane shifter to returning four high-res pixels at a time. 2021-10-25 13:34:36 -07:00
Thomas Harte
7118a515e0 Reduce logging in trustworthy areas. 2021-10-23 20:36:41 -07:00
Thomas Harte
952451c9b8 Add mouse input. 2021-10-23 20:17:13 -07:00
Thomas Harte
610327a04e Fix sprite H start bit order. 2021-10-22 23:20:20 -07:00
Thomas Harte
2121e32409 Fix sprite bit ordering. 2021-10-22 21:10:01 -07:00
Thomas Harte
7ec21edc2f Attempts to hack in some form of sprite display. 2021-10-22 19:51:10 -07:00
Thomas Harte
003162f710 Limit to specific purpose. 2021-10-22 16:16:19 -07:00
Thomas Harte
040ac93042 Takes a shot at the vertical stuff of sprite DMA. 2021-10-22 14:32:59 -07:00
Thomas Harte
b489ba3d0d Adds sprite DMA windows. 2021-10-22 13:07:20 -07:00
Thomas Harte
c5e8b547af Captures the attach flag and observes activation rule. 2021-10-22 11:21:58 -07:00
Thomas Harte
e67de90ad0 Starts to bring sprites inside DMADevice orthodoxy. 2021-10-21 21:57:46 -07:00
Thomas Harte
c3c84c88a1 Switch to ahead-of-time planar to chunky conversion. 2021-10-21 20:48:57 -07:00
Thomas Harte
0dc9c4cee1 Undo hard-coding of fetch window. 2021-10-19 15:18:39 -07:00
Thomas Harte
b312a61a81 Add two dummy reads. 2021-10-16 13:30:45 -07:00
Thomas Harte
4917556a99 The shift goes the other way in descending mode. 2021-10-16 11:09:40 -07:00
Thomas Harte
aa6b0f07b7 Correct filename. 2021-10-16 05:37:46 -07:00
Thomas Harte
e27a10bde4 Simplify control flow. 2021-10-14 16:47:18 -07:00
Thomas Harte
253a199f27 Fire sync-match interrupt upon any match. 2021-10-14 16:36:17 -07:00
Thomas Harte
61e5702520 Remove dead TODO. 2021-10-14 16:09:11 -07:00
Thomas Harte
b12c640807 Makes drives non-copyable. 
To avoid error in the future.
 2021-10-14 12:37:55 -07:00
Thomas Harte
9be23ecc34 Add end-of-Blit interrupt. 
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
 2021-10-13 15:09:19 -07:00
Thomas Harte
eec068914e Slightly improve logging. 2021-10-11 18:05:57 -07:00
Thomas Harte
39b8285ba5 Trust the HRM on step bit, but catch rising edge. 2021-10-11 07:42:42 -07:00
Thomas Harte
7733fef3bd DSKLEN has to be written twice. 2021-10-11 06:16:01 -07:00
Thomas Harte
6acddfdb98 Add the sync match interrupt. 
Albeit that it doesn't yet unblock disk DMA.
 2021-10-11 03:37:56 -07:00
Thomas Harte
99492c2ec2 Further tweak logging. 2021-10-10 18:19:50 -07:00
Thomas Harte
846b505d27 Reduce logging; disk data probably isn't the immediate obstacle. 2021-10-10 13:04:10 -07:00
Thomas Harte
8d43b4a98d Expands Disk DMA access window. 2021-10-10 11:47:02 -07:00
Thomas Harte
9336ffe216 Take a stab at index-hole sync. 2021-10-09 08:01:02 -07:00
Thomas Harte
eb157f15f3 Adds index hole interrupt. 2021-10-09 04:08:59 -07:00
Thomas Harte
d6e2a3f425 Make a first attempt to spool into RAM. 2021-10-08 18:11:47 -07:00
Thomas Harte
b47ca13ed3 Push disk data onwards. 2021-10-08 17:18:11 -07:00
Thomas Harte
67546c4d6e Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt. 2021-10-08 17:12:37 -07:00
Thomas Harte
f72deb0a5c Correct RDY position. 2021-10-08 04:32:13 -07:00
Thomas Harte
616ccbb878 Correct ID bit placement, multiplex with motor state. 
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
 2021-10-08 04:05:57 -07:00
Thomas Harte
5899af0038 Starts accumulating disk data. 2021-10-07 05:11:32 -07:00
Thomas Harte
33ff4f3b5c Eliminate drive copies. 2021-10-06 13:40:28 -07:00
Thomas Harte
20bad38d42 Add drive activity lights. 2021-10-06 04:54:40 -07:00
Thomas Harte
92a07398cd I think CHNG works the other way around. 2021-10-06 04:47:52 -07:00
Thomas Harte
e961d0b4a3 Switch RDY type. 2021-10-06 04:41:09 -07:00
Thomas Harte
2253ff656a Adds route for inserting disks. 2021-10-05 16:12:30 -07:00
Thomas Harte
18631399ad Attempts to clock the disk controller. 2021-10-05 15:38:56 -07:00
Thomas Harte
ad4afcdcd5 Switch stepping direction. 
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
 2021-10-05 15:23:48 -07:00
Thomas Harte
2cf5bcc5db Clarify logic somewhat. 2021-10-05 15:20:05 -07:00
Thomas Harte
1180ad7662 Disables a couple of now-trustworthy LOGs. 2021-10-05 06:51:47 -07:00
Thomas Harte
5463cd1ae3 Attempts to support stepping and head selection. 2021-10-05 06:36:17 -07:00
Thomas Harte
647ec770ce Implements motor latching, drive ID shift registers. 2021-10-05 05:12:01 -07:00
Thomas Harte
e47bec2e65 Switch CIA B ports over. 2021-10-05 03:38:11 -07:00
Thomas Harte
674941abdf Starts to add a disk controller. 2021-10-04 16:45:05 -07:00
Thomas Harte
b3f0ca39ed Adds some unused drives. 2021-10-04 08:12:13 -07:00
Thomas Harte
5ccb512883 Moves the CIAs into the Chipset class. 
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
 2021-10-04 06:44:54 -07:00
Thomas Harte
da286d5ae8 Switch spaces to tabs. 2021-10-04 05:27:25 -07:00
Thomas Harte
a282a51673 Remove last of the direct printf'ing. 2021-09-30 02:42:59 -04:00
Thomas Harte
b7b13e20d1 Single column blits should use both masks. 2021-09-29 22:49:35 -04:00
Thomas Harte
402fa41bc0 Corrects initial error value. 2021-09-29 22:19:17 -04:00
Thomas Harte
0b9ebafc0f Flip bit deserialisation order. 2021-09-28 22:12:13 -04:00
Thomas Harte
140e24ef15 Grab further copy flags. 2021-09-28 22:11:58 -04:00
Thomas Harte
ffcd2ea10c Attempts more properly to implement line mode. 2021-09-28 21:39:09 -04:00
Thomas Harte
cb460de94d Makes bad first attempt at a Bresenham inner loop. 2021-09-27 22:06:00 -04:00
Thomas Harte
f6624bf776 Edges mildly closer to line output. 2021-09-26 19:18:12 -04:00
Thomas Harte
b4b6c4d86f Attempts to support left and right masks. 2021-09-26 18:42:08 -04:00
Thomas Harte
759689ff31 Fix line mode flag, add busy status. 2021-09-26 18:16:00 -04:00
Thomas Harte
9012a7f5e1 Merge branch 'master' into Amiga 2021-09-23 23:00:03 -04:00
Thomas Harte
e5a5faa417 Resolves Clang 13 implicit conversion warnings. 2021-09-23 22:53:41 -04:00
Thomas Harte
c4ab2bbeed Hard-code fetch window width. For now. 2021-09-23 22:06:13 -04:00
Thomas Harte
42ef459e20 Resolve resting values. 2021-09-23 22:05:59 -04:00
Thomas Harte
cad1a9e0f1 Correct bit test. 2021-09-23 20:42:31 -04:00
Thomas Harte
f1d514470d Add note to future self. 2021-09-23 20:29:39 -04:00
Thomas Harte
9a7a54f22f Take alternative guess as to meaning of 'use' bits. 2021-09-23 18:42:12 -04:00
Thomas Harte
137d1c61bd Allow for channel enables and blitting direction. 2021-09-23 18:38:37 -04:00
Thomas Harte
adc071ed7a Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0. 2021-09-23 18:30:35 -04:00
Thomas Harte
e06f470044 Ensure no implicit conversion from int to IntT. 2021-09-23 18:30:04 -04:00
Thomas Harte
ab69fe56c9 Take a first shot at magical instant blitting. 2021-09-23 18:13:51 -04:00
Thomas Harte
60bad22a91 Correct fetch window. 2021-09-23 18:13:24 -04:00
Thomas Harte
7092429f7c Added some notes to self on line mode. 2021-09-20 23:08:26 -04:00
Thomas Harte
fa800bb809 Introduces code for minterm application. 2021-09-20 19:13:23 -04:00
Thomas Harte
e15f1103a0 Takes a shot at low resolution shifting. 2021-09-20 19:00:52 -04:00
Thomas Harte
a4263b5a8c Ties bitplane collection to line position. 
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
 2021-09-19 21:55:45 -04:00
Thomas Harte
245b7baa61 Moves the Copper into its own file. 2021-09-16 21:17:23 -04:00
Thomas Harte
0eeaaa150a Correct Copper start address. 2021-09-16 21:01:37 -04:00
Thomas Harte
692d87f446 Attempts to restrict blitter slot allocation. 2021-09-16 19:56:28 -04:00
Thomas Harte
6572efe2a7 Clarifies word addressing. 2021-09-16 08:24:52 -04:00
Thomas Harte
8aac2bd029 Stubs in serial port status. 2021-09-14 21:53:07 -04:00
Thomas Harte
add11db369 Factors out DMADevice, which is now a parent of Blitter. 2021-09-14 20:51:32 -04:00
Thomas Harte
e47eab1d40 Merge branch 'master' into Amiga 2021-09-14 20:27:59 -04:00
Thomas Harte
fa71ae3174 Add apology. 2021-09-14 20:23:36 -04:00
Thomas Harte
dfcd1508c9 Establishes valid initial BRAM. 2021-09-10 19:56:20 -04:00
Thomas Harte
7e5fc4444a Default to ROM01. 2021-09-09 22:09:09 -04:00
Thomas Harte
d8e42c4379 Tweak guess at initial state. 2021-09-09 22:06:36 -04:00
Thomas Harte
dd37fa49a0 Stabilises Apple IIgs display. 2021-09-09 20:08:15 -04:00
Thomas Harte
fd70f7ad43 Attempts to make pixel content observeable. 2021-09-08 20:57:26 -04:00
Thomas Harte
6e034c9b7f At least manages to place a pixel region on screen. 
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
 2021-08-11 20:31:37 -04:00
Thomas Harte
52e375a985 Move towards playfield decoding. 2021-08-11 18:47:35 -04:00
Thomas Harte
10a5e7313f Makes a buggy first attempt at bitplane data collection. 2021-08-10 21:28:48 -04:00
Thomas Harte
ec9cb21fae Starts towards bitplane collection. 2021-08-10 19:01:41 -04:00
Thomas Harte
fdd02ad6a6 Neaten, slightly. 2021-08-10 09:20:34 -04:00
Thomas Harte
76e9fcc94a Obey blitter DMA-enable mask. 2021-08-10 09:19:15 -04:00
Thomas Harte
e412927415 Logs a bit more from the Blitter, gives it access to slots. 2021-08-10 07:17:01 -04:00
Thomas Harte
dda154c7c6 Adds nonsense disk reads, which seems to lead to bitplane and blitter requests. 
Progress, at last!
 2021-08-09 20:31:14 -04:00
Thomas Harte
9215535bee Adds a container for the disk controller. 
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
 2021-08-09 17:35:09 -04:00
Thomas Harte
86c6248b48 Merge branch 'master' into Amiga 2021-08-09 17:09:04 -04:00
Thomas Harte
1502c4530e Takes a further step towards real timing. 2021-08-08 21:52:28 -04:00
Thomas Harte
c1df4d1c0b Mirroring is correct. 2021-08-08 20:20:12 -04:00
Thomas Harte
7f2610c4fc Disambiguates serial control logs. 2021-08-07 16:57:30 -04:00
Thomas Harte
b11dd6950c Adds an entry for DiagROM. 2021-08-07 16:56:18 -04:00
Thomas Harte
db3c158215 Further increases logging. 2021-08-05 20:07:14 -04:00
Thomas Harte
25e2bd307a Sets VPA for CIA accesses; logs a little more. 2021-08-05 20:06:48 -04:00
Adam Smith
fdb676da4e . 2021-08-01 00:26:14 -07:00
Thomas Harte
1bae4973bc Post the serial control write onwards. 2021-07-30 18:24:27 -04:00
Thomas Harte
3d9f86c584 Begins keyboard sketches and notes. 2021-07-30 18:23:15 -04:00
Thomas Harte
3514e537ca Minor logging tweaks. 2021-07-30 18:22:59 -04:00
Thomas Harte
b78090ec76 Fixes IOPortsAndTimers classification. 2021-07-28 19:39:42 -04:00
Thomas Harte
759007ffc1 Attempts to route CIA interrupts. 2021-07-28 19:36:30 -04:00
Thomas Harte
69ae9d72c8 Remove dead non-access. 2021-07-27 22:27:20 -04:00
Thomas Harte
604232acd9 Establish appropriate word-size mask. 2021-07-27 22:23:38 -04:00
Thomas Harte
82205d71cc Breaks up loop for arithmetic simplicity. 2021-07-27 21:59:27 -04:00
Thomas Harte
402eab10f8 Breaks video output while attempting to pull it into the main loop. 2021-07-27 21:33:07 -04:00
Thomas Harte
b6bf4d73ad Blitter-finished bit aside, attempts to complete the Copper. 2021-07-27 21:10:14 -04:00
Thomas Harte
5425b5c423 Adds some form of WAITing to the Copper. 2021-07-27 19:32:55 -04:00
Thomas Harte
29cd8504ca Implements enough Copper to get a first store. 2021-07-27 19:06:16 -04:00
Thomas Harte
3544746934 Modifies interface, starts on scheduler. 
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
 2021-07-27 16:41:18 -04:00
Thomas Harte
d8f814f1c4 If I'm going to push only a single colour, might as well make it fast. 2021-07-26 21:19:43 -04:00
Thomas Harte
a43175125a Assuming I'm going to keep this synchronous, extends function signature. 2021-07-26 20:13:06 -04:00
Thomas Harte
1d03bc560a Stores the colour palette, uses entry 0 as my new always output. 2021-07-26 18:59:11 -04:00
Thomas Harte
3832acf6e3 Produces a static white box, at least. 2021-07-26 18:51:01 -04:00
Thomas Harte
7894b50321 Starts towards an actual pixel output loop. 2021-07-26 18:44:20 -04:00
Thomas Harte
ffded619e6 Returns track 0 found, as a guess. 2021-07-26 18:44:01 -04:00
Thomas Harte
bcb7bb5cce Improves logging further. 
To investigate the new perpetual loop.
 2021-07-26 17:02:30 -04:00
Thomas Harte
87dcd82f69 Makes a first attempt at some sort of interrupt functionality. 2021-07-26 16:40:42 -04:00
Thomas Harte
e671cc6056 Add stubs for joystick/mouse querying. 2021-07-26 16:21:51 -04:00
Thomas Harte
5da89b88a6 Add missing space. 2021-07-25 22:17:55 -04:00
Thomas Harte
5d60c1f20b Stubs in Paula. 2021-07-25 22:16:31 -04:00
Thomas Harte
7fd00165c9 Switch to [hard-coded] PAL, for now. 
In the hope that I get to see some graphics soon, this should better conform to my expectations.
 2021-07-25 20:41:51 -04:00
Thomas Harte
20da194fab Log slightly more accurately. 2021-07-25 19:59:24 -04:00
Thomas Harte
e3bb9fc1d7 Increase logging. 2021-07-23 23:10:00 -04:00
Thomas Harte
d898a43dff Implements time-of-day counters, provisionally. 
Interrupts to do.
 2021-07-23 21:24:07 -04:00
Thomas Harte
86c30769d9 Add a divide-by-ten for the CIAs. 2021-07-23 19:25:53 -04:00
Thomas Harte
956a6dbd64 Improve commentary. 2021-07-23 19:23:54 -04:00
Thomas Harte
de208ead4e Stubs in enough to get back into a persistent loop. 2021-07-22 22:00:53 -04:00
Thomas Harte
87d2fc1491 Adds enough raster position to return something. 2021-07-22 21:45:51 -04:00
Thomas Harte
2bc9af09e1 Factors out the chipset. 2021-07-22 21:16:23 -04:00
Thomas Harte
d1ac54fe92 Stubs in sprite containers. 2021-07-22 19:00:26 -04:00
Thomas Harte
9468adf737 Stubs in Copper addresses. 2021-07-22 18:51:23 -04:00
Thomas Harte
e85db40b0f Sketches out a blitter class. 2021-07-22 18:43:07 -04:00
Thomas Harte
b3d55cc16d Adds non-committal reads for some write-only registers. 
The hardware now proceeds to trying to talk to the Blitter. So that's next.
 2021-07-22 16:10:30 -04:00
Thomas Harte
3ee1fc544f Fix: (1) memory base adjustment; (2) out-of-bounds writes. 2021-07-21 21:49:20 -04:00
Thomas Harte
ba2e5a97a9 Provisionally adds a status LED. 2021-07-19 22:31:36 -04:00
Thomas Harte
4515d1220c Switches CIA A/B byte connections; applies reset to memory map. 2021-07-19 22:17:40 -04:00
Thomas Harte
486959bce8 With minor additional logging, it appears the Amiga just keeps resetting itself. 2021-07-19 21:50:35 -04:00
Thomas Harte
e1a410bf3d Further mildly increases logging. 2021-07-19 20:54:32 -04:00
Thomas Harte
3767cc7c0b Increase logging; fix set/clear of interrupt enable mask. 2021-07-19 19:03:37 -04:00
Thomas Harte
96b0ce9ef2 Merge branch 'master' into Amiga 2021-07-18 22:16:05 -04:00
Thomas Harte
cfaf4a8a65 Add advised brackets; clarify type punning. 2021-07-18 22:11:11 -04:00
Thomas Harte
22dd8a8847 Stubs onward to a second endless loop. 2021-07-18 20:55:33 -04:00
Thomas Harte
3e2bac8129 Stubs in enough to get to a permanent loop. 2021-07-18 20:25:43 -04:00
Thomas Harte
c425dec4d5 Makes some attempt to get as far as the overlay being disabled. 2021-07-18 17:17:41 -04:00
Thomas Harte
622cca0acf Adds sufficient address decoding to print a more helpful exit message. 2021-07-18 12:13:56 -04:00
Thomas Harte
48999c03a5 Adds concept of time, captured port handler. 2021-07-18 11:49:10 -04:00
Thomas Harte
b1616be4b8 Gets to what is probably a CIA access? 2021-07-17 21:36:20 -04:00
Thomas Harte
a0a9a72d8f Begins sketching out a memory mapper. 2021-07-17 21:10:06 -04:00