Thomas Harte
ec6664f590
Takes steps to guarantee property naming; reintroduces Electron runtime options.
2020-03-17 23:52:55 -04:00
Thomas Harte
24340d1d4f
Resolves fetch errors.
2020-02-09 17:04:49 -05:00
Thomas Harte
f3db1a0c60
Eliminates ad hoc scheduling for delayed DE -> LOAD.
2020-01-29 22:50:22 -05:00
Thomas Harte
ce28213a5e
[Mostly] unifies deferral process.
2020-01-29 22:46:08 -05:00
Thomas Harte
f0a6e0f3d5
Splits out the queue management stuff from queue+action.
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Temporarily breaks ST video in the endeavour.
2020-01-29 22:18:41 -05:00
Thomas Harte
65309e60c4
Corrects sequence point generation by allowing for hsync_end != end of line.
2020-01-28 20:38:20 -05:00
Thomas Harte
7e8405e68a
Makes 72Hz horizontal sync independently relocatable.
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... and moves and shortens it, based on my guesswork as to requirements.
2020-01-27 23:40:01 -05:00
Thomas Harte
a71c5946f0
Ensures proper manipulation of scan_statuses, leading to the correct result out of a CRTMachine.
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Possibly with the exception of the TMS, as I appear to have uncovered an unrelated issue there.
2020-01-21 22:28:25 -05:00
Thomas Harte
d97a073d1b
Adds the necessary routine for all machines to be able to respond to get_scan_status.
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They all just as the CRT, as all are currently based on the CRT. Which doesn't currently know the total clock rate it would need to in order properly to scale the answer to the question. Further thought coming.
2020-01-20 21:45:10 -05:00
Thomas Harte
c8fe66092b
Attempts to correct insertion logic (and mostly bypasses it).
2019-12-29 21:42:41 -05:00
Thomas Harte
b33218c61e
Fixes reload test, which really needs to sense the CRT-headed vsync output.
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i.e. not the one heading back to the CPU.
2019-12-29 20:55:34 -05:00
Thomas Harte
8ce26e7182
Adds a delay on vsync visibility (i.e. as to generating an interrupt).
2019-12-29 19:03:08 -05:00
Thomas Harte
214b6a254a
Adds a delay on visibility of the hsync signal, and a test on address reload.
2019-12-29 17:37:09 -05:00
Thomas Harte
13f11e071a
Simplifies border colour change propagation.
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I'm not sure it was even technically correct as was.
2019-12-28 10:45:10 -05:00
Thomas Harte
5026de9653
Rejigs the video stream to ensure shifter really is continuous.
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... and definitively to avoid potential buffer overruns. Or, at least, to have a mechanism in place definitively to avoid them. Which will be tested and debugged as necessary.
Also simplifies the colour burst and border/pixels selection logic.
2019-12-27 22:47:34 -05:00
Thomas Harte
5fa8e046d8
It's inaccurrate to call this _the_ shifter. So don't.
2019-12-27 19:03:10 -05:00
Thomas Harte
e5440a4146
Hacks in a colour burst.
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With a major flaw: it's implicit. I think I need a minor rethink of various components here.
2019-12-20 23:49:38 -05:00
Thomas Harte
47508d50a7
Wires through a composite video option for the ST.
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Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.
2019-12-20 20:49:14 -05:00
Thomas Harte
c00ae7ce6a
Adds a one-cycle delay on frequency changes.
2019-12-13 19:57:54 -05:00
Thomas Harte
4bcf217324
Ensures delayed loading isn't interrupted by blank, hsync.
2019-12-12 23:20:28 -05:00
Thomas Harte
95b5db4d87
Tweaks timings yet further, adds a FIFO reset.
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The accuracy of this may require further research.
2019-12-11 23:22:20 -05:00
Thomas Harte
0a405d1c06
Introduces a latency between DE and load.
2019-12-10 21:24:15 -05:00
Thomas Harte
0408592ada
Switches to byte buffers and seeks to reduce unnecessary video flushing.
2019-12-08 20:20:13 -05:00
Thomas Harte
1202b0a65f
Establishes a pipeline for delayed public state visibility.
2019-11-17 23:28:00 -05:00
Thomas Harte
facc0a1976
Amps up the documentation.
2019-11-17 21:28:51 -05:00
Thomas Harte
ab34fad8ca
Introduces a cleaner, separated shifter.
2019-11-10 21:39:40 -05:00
Thomas Harte
77ef7dc8fc
Shuffles ST and 2600 into a common parent.
2019-11-09 15:31:41 -05:00
