1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-02 01:04:54 +00:00
Commit Graph

71 Commits

Author SHA1 Message Date
Thomas Harte
8827597363 Messier and messier, but I've at least attempted to implement hardware attention acknowledge. 2016-07-08 19:00:39 -04:00
Thomas Harte
9a08ef61cb Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs. 2016-07-07 22:13:18 -04:00
Thomas Harte
199c0e27e0 Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning. 2016-07-07 07:16:36 -04:00
Thomas Harte
81e6cc34e5 Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus. 2016-07-07 06:57:21 -04:00
Thomas Harte
c9479f923b The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive. 2016-07-07 06:44:13 -04:00
Thomas Harte
dcb86a027a Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps. 2016-07-06 22:31:14 -04:00
Thomas Harte
1baf21827c Since the ROM is well disassembled, let's actually try to be a 1541 first. 2016-07-06 22:17:32 -04:00
Thomas Harte
f64cd8cfcb Quick fixes properly to declare the DriveVIA, to ensure its interrupts take effect, and to wire ATN IN to CA1 rather than CB2. 2016-07-06 20:22:46 -04:00
Thomas Harte
428fcdb978 Centralised and improved serial logging. 2016-07-06 07:46:21 -04:00
Thomas Harte
8819711bc8 Threw in the second VIA as a currently clearly incorrect thing. 2016-07-05 22:22:09 -04:00
Thomas Harte
93c2bb80a2 Improved a comment, added independent C[A/B]2 input mode. 2016-07-05 21:11:51 -04:00
Thomas Harte
6c4fa4ec5d Improved commenting and initial state communication. 2016-07-05 20:57:31 -04:00
Thomas Harte
1e6d90de17 Made an attempt properly to deal with initial bus state. 2016-07-05 20:52:33 -04:00
Thomas Harte
c3b7d24293 It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court. 2016-07-05 19:19:46 -04:00
Thomas Harte
11fc43aa04 Made an attempt to allow the 1540 to talk back to the Vic, and to receive interrupts. Also slightly disambiguated debugging logging. 2016-07-05 19:12:43 -04:00
Thomas Harte
d16b79073e Further fleshing out: added a serial port for the serial bus. 2016-07-05 17:27:02 -04:00
Thomas Harte
d1eea6943d Ensured the 1540 ROM gets installed, at least. 2016-07-05 16:54:25 -04:00
Thomas Harte
86dabd007b Furthered fleshing out of the 1540. Though it doesn't yet receive a ROM so won't even attempt to do anything meaningful. 2016-07-05 16:39:18 -04:00
Thomas Harte
a25fcc7190 Made a first attempt at wiring back serial port input. 2016-07-05 16:10:54 -04:00
Thomas Harte
d2cded7b59 Attempted to separate out the concept of a serial port and a serial bus, since the bus may be shared, and to establish half duplex communications from the Vic. 2016-07-05 14:55:20 -04:00
Thomas Harte
0d3d0fbe4d Created a namespace for Commodore and an empty container file for the 1540[/1] implementation. 2016-07-05 13:28:27 -04:00