Thomas Harte
ce099a297a
Eliminates RAM writes in ROM area.
...
I no longer think that logic is correct.
2019-05-07 17:16:22 -04:00
Thomas Harte
949c848815
Broadens address decoding.
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To no obvious change in output.
2019-05-06 22:57:29 -04:00
Thomas Harte
9bf9b9ea8c
Ensures unmapped peripherals return a consistent value.
2019-05-06 21:32:10 -04:00
Thomas Harte
d8ed8b66f3
Improves carry/extend for ROXL and ROXR.
2019-05-06 21:14:16 -04:00
Thomas Harte
a131d39451
I now believe only the 6522 is on the synchronous bus.
2019-05-06 14:10:13 -04:00
Thomas Harte
b540f58457
Sets a more appropriate display type.
2019-05-05 23:22:05 -04:00
Thomas Harte
4f5a38b5c5
Adds support for the alternate video buffer.
2019-05-05 23:05:24 -04:00
Thomas Harte
cefc3af08b
Corrects RAM read decoding when the ROM overlay is enabled.
2019-05-05 22:48:40 -04:00
Thomas Harte
e6ed50383c
Corrects PEA and MOVE.l (An)[+], (xxx).L; also adds an extra test that caught the latter.
2019-05-05 22:47:54 -04:00
Thomas Harte
96facc103a
Adds an IWM shim and corrects graphics output.
...
... now that there is some.
2019-05-05 21:55:34 -04:00
Thomas Harte
407bbfb379
Pretending the Disk II is an IWM doesn't seem to achieve much.
2019-05-05 18:12:25 -04:00
Thomas Harte
a99ebda513
Takes a first shot at (inverted) Mac video output.
2019-05-04 22:27:58 -04:00
Thomas Harte
537b604fc9
It looks like writes should always go to RAM.
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Now I see the screen buffer being filled with `0xffff`s, along with what is probably disk motor control data.
2019-05-04 17:29:30 -04:00
Thomas Harte
98bc570bf7
Adds further boilerplate around VIA and IWM decoding.
2019-05-04 17:12:26 -04:00
Thomas Harte
181b77c490
Adds decoding of IWM accesses and respect for the ROM overlay bit.
2019-05-04 16:38:01 -04:00
Thomas Harte
bc9eb82e6f
Adds in VIA access decoding, and a note to self on video.
...
The Mac now proceeds to try to talk to the IWM.
2019-05-04 14:23:37 -04:00
Thomas Harte
29fc024ecd
Starts negotiating the Macintosh memory map.
2019-05-04 12:33:27 -04:00
Thomas Harte
c1695d0910
Adds various notes to self.
2019-05-03 23:55:28 -04:00
Thomas Harte
6d6a4e79c9
Adds the absolute basics to include a 6522 in the Macintosh.
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Not yet wired to anything.
2019-05-03 23:40:22 -04:00
Thomas Harte
417a3e1540
Adds missing call to flush.
2019-05-03 23:31:12 -04:00
Thomas Harte
fa8c804d47
Makes explicit a few implicit type conversions.
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There's plenty more down this well, alas.
2019-05-03 23:26:03 -04:00
Thomas Harte
68392ce6f5
Adds enough of a concept of Mac video to get a properly initialised display.
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Completely empty at present, naturally. Also this is the very first time I've run my 68000 at live speed. From just one data point, it's not terrible. Phew!
2019-05-03 23:25:42 -04:00
Thomas Harte
6873f62ad8
Ensures that the Mac now retains its ROM properly.
2019-05-03 22:39:09 -04:00
Thomas Harte
5f385e15f6
Adds the bare bones necessary to be able to create a Macintosh from File -> New... .
2019-05-03 22:16:07 -04:00
Thomas Harte
8c5d37b6ee
Refactors the AppleII into a sub-namespace to make room for other Apple machines.
2019-05-03 18:14:10 -04:00
Thomas Harte
9c3c2192dd
Merge pull request #611 from TomHarte/68000
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Adds an Initial Emulation of the 68000
2019-05-03 15:08:24 -04:00
Thomas Harte
4f9f73ca81
Corrects tests affected by change in run_for_instructions semantics and new program base address.
2019-05-03 15:05:14 -04:00
Thomas Harte
2c9a1f7b16
Restores vector.
2019-05-03 14:50:07 -04:00
Thomas Harte
0ea4c1ac80
Evicts #includes from my namespace.
2019-05-03 14:48:39 -04:00
Thomas Harte
a873ec97eb
Also previously missing: vector.h.
2019-05-03 14:43:31 -04:00
Thomas Harte
cc8a65780e
Adds further missing includes.
2019-05-03 14:42:36 -04:00
Thomas Harte
c117deb43b
Introduces a couple of missing #includes.
2019-05-03 14:37:05 -04:00
Thomas Harte
ae31d45c88
Introduces the 68000 to SConstruct.
2019-05-03 14:31:09 -04:00
Thomas Harte
a0eb20ff1f
Tweaks divide-by-zero timing.
2019-05-03 14:29:36 -04:00
Thomas Harte
34fe9981e4
Added necessary mea culpas.
2019-05-03 14:25:25 -04:00
Thomas Harte
291e91375f
Takes a shot at the synchronous bus.
2019-05-03 14:20:59 -04:00
Thomas Harte
857f74b320
Fixed: the accepted interrupt level now appears on the bus.
2019-05-02 15:47:12 -04:00
Thomas Harte
1d9608efc7
Alters the order of interrupt bus activity, to bring it into line with a real 68000.
2019-05-02 15:25:43 -04:00
Thomas Harte
93616a4903
Completes test of a vectored interrupt.
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Correcting issues uncovered.
2019-05-02 00:00:09 -04:00
Thomas Harte
bb07206c55
Corrects internet response to work as currently implemented.
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Also makes corrections to the bus error and address error exceptions.
2019-05-01 21:59:06 -04:00
Thomas Harte
2e5c0811e7
Makes some effort at getting into interrupt processing.
2019-05-01 15:26:36 -04:00
Thomas Harte
f6ac407e4d
Takes further steps towards supporting interrupts.
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Specifically:
* introduces the necessary bus signalling; and
* adds corresponding functional steps.
Still to figure out: getting into and out of an interrupt cycle.
2019-05-01 15:19:24 -04:00
Thomas Harte
078c3135df
The 5/3 split of microcycles appears not accurately to model when lines are tested.
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Therefore I've reverted to a more normative 4:4 form.
2019-04-30 22:09:13 -04:00
Thomas Harte
92568c90c8
Adds support for HALT as an input, and puts some effort into how to calculate E.
2019-04-30 22:07:48 -04:00
Thomas Harte
f1879c5fbc
Corrects interrupt level test within STOP.
2019-04-30 19:32:35 -04:00
Thomas Harte
31bb770fdd
Implement STOPpages, waits for DTack, and bus and address error exceptions.
2019-04-30 19:24:22 -04:00
Thomas Harte
e430f2658f
Adds a test and by that means fixes divide-by-zero exception return addresses.
2019-04-29 23:09:50 -04:00
Thomas Harte
3060175ff5
Eliminates constructions of std::tuple for performance reasons.
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Specifically: reduces 68000 construction time from 10+ seconds to more like 2.8.
2019-04-29 22:43:15 -04:00
Thomas Harte
eb4233e2fd
Joins some commonalities, shaving about 150 lines of code.
2019-04-29 22:37:23 -04:00
Thomas Harte
6b4c656849
Reverses order of instruction instantiation, reducing total bus step heft by about 11%.
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... since that means inserting more complicated instructions before simpler ones in general, making subset finds more likely.
2019-04-29 22:20:18 -04:00
