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2303 Commits

Author SHA1 Message Date
Thomas Harte
6526c645a5 Merge branch 'master' into AppleIIgs 2021-02-02 21:29:38 -05:00
Thomas Harte
1e041f1adf Flips conditionals to ensure 65802 safety. 2021-02-02 20:52:34 -05:00
Thomas Harte
beb514b231 Adds an additional mapping for copy. 2021-02-02 20:37:15 -05:00
Thomas Harte
f57e897085 Corrects visibility of SCSI output. 2021-02-02 20:24:39 -05:00
Thomas Harte
9f202d4238 Adds SCSI interrupt support. 2021-02-01 17:40:11 -05:00
Thomas Harte
1a40cc048e Niceties: include AP6 ROM for hard-disk users; show SCSI activity indicator. 2021-01-31 21:41:11 -05:00
Thomas Harte
53514c7fdc Ensures non-breakage of Qt interface. 2021-01-31 21:28:55 -05:00
Thomas Harte
274b3c7d24 Handles SCSI changes on-demand. 2021-01-31 21:24:54 -05:00
Thomas Harte
906b6ccdb7 This appears to be sufficient for the Electron to _read_ SCSI. 
So that's step one.
 2021-01-31 18:36:29 -05:00
Thomas Harte
8db289e229 Adds some notes-to-self on SCSI and a route to using Acorn's ADFS. 2021-01-31 13:12:59 -05:00
Thomas Harte
2860be7068 Permit a longer pause at startup for Electron commands that start with shift, control or func. 2021-01-31 12:25:22 -05:00
Thomas Harte
b5ecd5f7ef Merge branch 'master' into AppleIIgs 2021-01-31 11:47:40 -05:00
Thomas Harte
4636d8dfb7 Adds support for installing the AP6 ROM and/or sideways RAM. 2021-01-30 19:38:19 -05:00
Thomas Harte
b8c6d4b153 Rips out my high-level ADB microcontroller protocol implementation. 
Adds just enough that the main computer validates the ADB controller as present and talking.
 2021-01-30 17:53:27 -05:00
Thomas Harte
f50e8b5106 If I'm going to maintain the max_address approach, & is 'correct'. 
% +1 would be 'more correct', but I think this approach is probably misguided.
 2021-01-27 18:31:11 -05:00
Thomas Harte
dcc2fe0990 Improves M50470 entry-point detection, adds test output. 2021-01-26 21:29:17 -05:00
Thomas Harte
56111c75ae Makes first efforts towards disassembly. 2021-01-26 19:52:30 -05:00
Thomas Harte
fc4bda0047 Experimentally flipping interpretation of the output bit gives something closer to coherent. 2021-01-25 22:02:39 -05:00
Thomas Harte
c8beb59172 Attempts properly to track ADB bus activity. 
Output is not yet a valid ADB stream. Work to do.
 2021-01-25 17:43:22 -05:00
Thomas Harte
8789ffda15 Corrects performer storage, RMW/W confusion, implicit casts, port readback. 2021-01-24 22:30:42 -05:00
Thomas Harte
e8e604dc3c Attempts to wire up M50470 and GLU. 
Resulting in an unexpected interest in R15. Bugs to find, I guess.
 2021-01-24 18:07:05 -05:00
Thomas Harte
57e0fdfadc Ensures ADB microcontroller is clocked. 
And runs at the 'correct' speed (i.e. modulo my instruction-by-instruction implementation).
 2021-01-23 22:55:12 -05:00
Thomas Harte
ec0018df79 Routes in the ADB keyboard ROM. This should get as far as parsing. 2021-01-18 16:59:49 -05:00
Thomas Harte
12784a71e2 A stab in the dark: does the IOLC inhibit also affect vector fetches? 2020-12-29 20:53:56 -05:00
Thomas Harte
114d48b076 This register appears to be read/write. 2020-12-11 21:43:34 -05:00
Thomas Harte
6e9d517c26 Minor cleanliness improvement. 2020-12-11 21:43:13 -05:00
Thomas Harte
159924dcc0 More clarity tweaks. 2020-12-10 22:47:11 -05:00
Thomas Harte
5d8f284757 Makes minor style improvements. 2020-12-10 22:11:53 -05:00
Thomas Harte
c978a95463 Increases asserts and adds a test. 
Thereby discovers and fixes a problem with set_main_paging().
 2020-12-10 21:49:23 -05:00
Thomas Harte
dbdea95241 Ensure use_automatic_tape_control_ is always a valid bool. 2020-12-09 20:10:56 -05:00
Thomas Harte
1928c955d9 Ensures safe startup of the Ensoniq. 2020-12-09 19:46:32 -05:00
Thomas Harte
049a78c667 Slightly restricts video flushing test. 2020-12-08 18:47:15 -05:00
Thomas Harte
65ca931e83 Throws in a new assert, against the unimplemented bit 0 of new video. 2020-12-06 20:26:24 -05:00
Thomas Harte
6cb71eb11b This needs explicitly to be a bool for the table lookups to work. 2020-12-06 16:43:07 -05:00
Thomas Harte
43251193ee The actual maximum line length is now 656. 2020-12-06 16:42:43 -05:00
Thomas Harte
55de98fb46 Adds a new statement of intent. 
Now I need to try to decide whether I like my current all-in-one mapping for shadowing + paging, or whether it's better to split the things. I'm tending towards the latter at least until the functionality works.
 2020-12-05 19:09:21 -05:00
Thomas Harte
1422d43c35 Corrects documentation errors and ambiguities. 2020-12-05 19:07:38 -05:00
Thomas Harte
6273ef8ba2 Adds means to force specific ROM 03 self tests. 2020-12-02 20:48:19 -05:00
Thomas Harte
3c6f09a898 Corrects super high-res aspect ratio and placement. 2020-12-02 20:47:26 -05:00
Thomas Harte
24fcb0c24b Corrects video counter values. 
The built-in speed test now passes.
 2020-12-01 18:35:55 -05:00
Thomas Harte
03e2b6a265 Makes a slightly more rigorous attempt at discerning 1Mhz and 2.8Mhz operation. 2020-12-01 17:46:30 -05:00
Thomas Harte
ee22cf7ca1 Ensures that PAGE2 propagates from the state register to video. 2020-11-30 22:56:19 -05:00
Thomas Harte
187f507532 The soft switch is LCBANK2, not LCBANK1. 
[This also jimmys the IIgs into always entering its extended self test, for now]
 2020-11-30 22:35:51 -05:00
Thomas Harte
6000bd3a5e Adds a bonus debugging assert. Let's see. 2020-11-30 18:15:02 -05:00
Thomas Harte
87069da3dd Improves exposition, eliminates a couple of redundant map adjustments. 2020-11-30 18:07:03 -05:00
Thomas Harte
5cb4077576 Switches from modulo to and. 2020-11-30 17:47:57 -05:00
Thomas Harte
e9c7e0b9dd Provisionally reverses meaning of language card RAM bank select. 2020-11-29 21:57:17 -05:00
Thomas Harte
35aa7612bb Ensures that auxiliary/language-card soft switches don't trigger my assert. 2020-11-29 21:32:24 -05:00
Thomas Harte
acaa841822 Adds guaranteed trip to ROM for vector pulls. 2020-11-29 21:29:15 -05:00
Thomas Harte
46c1c9b5ee CLRVBLINT calls it 3.75Hz. Which makes the arithmetic nicer. 2020-11-29 21:25:06 -05:00
Thomas Harte
4bdbca64b2 Takes a shot at the Mega II-style video interrupts. 2020-11-29 21:21:46 -05:00
Thomas Harte
11fe8ab6db Corrects counter scales, adds a read for $c032. 
Albeit that I have no idea what that's supposed to read as.
 2020-11-29 20:08:59 -05:00
Thomas Harte
a9ce43d244 Takes a shot at the two video counter registers. 2020-11-29 19:57:35 -05:00
Thomas Harte
091bce9350 Merge branch 'master' into AppleIIgs 2020-11-29 00:09:20 -05:00
Thomas Harte
a965c8de9f Resolves intended reset_all_keys. 2020-11-27 21:53:34 -05:00
Thomas Harte
79ef026b93 Allows machines to declare a preference for logical input. 
It's only a preference, and the Apple II does prefer it.
 2020-11-27 21:00:48 -05:00
Thomas Harte
a4ab5b0b49 Does a better job of ensuring sensible key mappings. 2020-11-27 20:49:38 -05:00
Thomas Harte
310282b7c9
Ensures extra_border_length always has a defined value. 2020-11-27 10:31:04 -05:00
Thomas Harte
af667c718e Gets a bit more rigorous in remaining missing parts. 2020-11-26 22:36:32 -05:00
Thomas Harte
950f5b1691 Closes the loop on interrupts. 2020-11-26 19:56:42 -05:00
Thomas Harte
cbc0d848ad Implements most of get_data. 2020-11-26 17:25:27 -05:00
Thomas Harte
f4d13d1f6f Takes a run at the bus side of honouring Ensoniq sequence points. 2020-11-26 17:14:46 -05:00
Thomas Harte
6808ad6f5d Adds a getter for the interrupt line. 2020-11-26 16:44:35 -05:00
Thomas Harte
7a8920ee38 Takes a stab at next_sequence_point. 2020-11-26 16:41:11 -05:00
Thomas Harte
4870506f6e Implements skip_audio. 2020-11-26 16:24:48 -05:00
Thomas Harte
6f47f9d67c Corrects placement of address bits. 2020-11-26 16:15:40 -05:00
Thomas Harte
8093f67173 Ensures video interrupts can't be missed by a suitably-timed access. 2020-11-26 16:11:03 -05:00
Thomas Harte
72884f37c3 It's still interrupt-deficient, but fills in additional Ensoniq audio generation. 2020-11-26 16:03:28 -05:00
Thomas Harte
8edb3fcd5f Attempts to obey accumulator size in determining sample end. 2020-11-26 15:07:29 -05:00
Thomas Harte
fdd102df52 Resolves border colour resets. 2020-11-26 13:13:48 -05:00
Thomas Harte
03a893dc74 Quick refactor: this clearly isn't a VideoBase, it's the full implementation. 2020-11-26 12:54:20 -05:00
Thomas Harte
56de2512ae Adds a further safety assert. 2020-11-25 23:34:30 -05:00
Thomas Harte
cdc2311045 Enables fuzzing, adds a definite no-op write. 2020-11-25 23:33:55 -05:00
Thomas Harte
eec27c3406 Reaches for marginally more coherent ADB data. 2020-11-25 17:34:00 -05:00
Thomas Harte
098a22aa95
Avoid out-of-bounds access of double_bytes. 2020-11-24 09:38:07 -05:00
Thomas Harte
7ede3d2b9e Corrects collection of palettes other than palette 0. 2020-11-23 21:00:26 -05:00
Thomas Harte
e7160fe3c3 Rounds out the IIgs video hardware, bugs aside. 2020-11-23 20:58:32 -05:00
Thomas Harte
9d61665014 Attempts to add colour double [low/high] resolution output. 2020-11-23 19:05:18 -05:00
Thomas Harte
d2938ad7c8 Eliminate magic constants. 2020-11-23 18:36:44 -05:00
Thomas Harte
46f7ff07f7 Adds support for fill mode. 2020-11-22 21:55:21 -05:00
Thomas Harte
8ace258fbc Tackles outstanding GCC warnings. 2020-11-22 21:43:56 -05:00
Thomas Harte
a34f294ba8 Pulls out commonalities re: NTSC colour, ensures mixed modes on a line works. 2020-11-22 21:29:40 -05:00
Thomas Harte
cd7d080b7a Corrects low-resolution mode. 2020-11-22 20:52:42 -05:00
Thomas Harte
b0936b6ef4 Resolves high-resolution output. 
Yet to optimise, but working.
 2020-11-22 19:10:05 -05:00
Thomas Harte
8fae74f93e Reintroduces delay bit, reverses phase. 
There are stray columns of errors, but otherwise this is almost correct.
 2020-11-22 11:06:14 -05:00
Thomas Harte
fca48e4b66 Makes hasty attempt to shift 'NTSC' in the most natural direction. 2020-11-21 23:39:58 -05:00
Thomas Harte
3b2ea37428 Slightly cleans up. 2020-11-21 22:53:26 -05:00
Thomas Harte
3cba3a5ac0 Corrects card mask test outside of bank $00. 2020-11-21 22:22:27 -05:00
Thomas Harte
4b024c5787 Starts to make some attempt at classic II modes. 2020-11-21 18:07:51 -05:00
Thomas Harte
4a42de4f18 Attempts to add 5.25" drive support to the IIgs. 
I want to try some classic software.
 2020-11-20 21:37:17 -05:00
Thomas Harte
d00e5d23ef Takes a second shot at the MemoryWrite constructor complaint. 2020-11-19 22:28:10 -05:00
Thomas Harte
2c9ce116a2 Resolves various GCC-reported issues. 2020-11-19 22:21:20 -05:00
Thomas Harte
3512352c32 Attempt to use the most-significant relevant bits for sample position. 2020-11-19 22:13:09 -05:00
Thomas Harte
4d9372c52f Also takes a stab at swap mode. 2020-11-19 21:56:49 -05:00
Thomas Harte
1d288b08b6 Attempts the two most basic forms of DOC output. 
Sans interrupts. Or register reads of any variety.
 2020-11-19 21:19:27 -05:00
Thomas Harte
f3c7c11772 Register writes now reach the audio thread. 2020-11-18 21:52:03 -05:00
Thomas Harte
4b9fe805e9 Sets up a queue to push memory writes onto the audio thread. 2020-11-18 21:40:56 -05:00
Thomas Harte
a7051e4e42 Strip this forceinline until I've satisfied myself that it works in declarations. 2020-11-18 21:40:25 -05:00
Thomas Harte
34794223b4 For now, at least, c800–cfff is always built-in ROM. 
Otherwise I probably need to extend my c3 logic to cover the other built-in cards (?)
 2020-11-18 19:49:45 -05:00
Thomas Harte
96cf617ee6 Advances slightly. I think I need a custom queue for RAM writes. 2020-11-18 19:48:53 -05:00
Thomas Harte
69dddf34b9 Adds bonus sanity check. 2020-11-18 19:47:56 -05:00
Thomas Harte
8f4597f742 Hacks in double text. 
Actually, only one error: it should start half a column earlier. All 'double' output should. TODO.
 2020-11-18 19:47:22 -05:00
Thomas Harte
98347cb1c3 Starts in the direction of audio support. 2020-11-18 18:39:11 -05:00
Thomas Harte
62f936128d It seems possibly there is a distinct IIgs character ROM? 2020-11-16 22:22:26 -05:00
Thomas Harte
bb80e53021 Reduces frequency of video flushes. 2020-11-16 21:55:41 -05:00
Thomas Harte
952891d1b6 Improves commentary. 2020-11-16 21:46:35 -05:00
Thomas Harte
6dfad6a44b Slightly reduces logging. 
Hopefully soon I can tear the whole lot out.
 2020-11-16 21:46:19 -05:00
Thomas Harte
e4c5bfdd5c Takes a repeat shot at proper shadowing. 
I think the Apple IIgs Technical Reference explains how these bits interact, and I just had inhibit_all_pages off all on my own.
 2020-11-16 19:54:12 -05:00
Thomas Harte
9a55eb56ea Attempts to provide saner sequence point behaviour. 2020-11-16 19:00:11 -05:00
Thomas Harte
9206ab5dc3 Adds notes to self; implements get_next_sequence_point for video, allowing per-line interrupts. 2020-11-16 14:42:50 -05:00
Thomas Harte
7e39550fc0 Attempts to make JustInTimeActor sequence-point aware. 
With the objective of chopping out a lot of future boilerplate.
 2020-11-15 21:58:18 -05:00
Thomas Harte
c3f5fbd300 Picks a better framing compromise for classic and new video modes. 2020-11-15 19:14:43 -05:00
Thomas Harte
1db713fec1 Attempts more meaningful super high-res pixel output. 
With a timing hack as noted.
 2020-11-15 18:36:24 -05:00
Thomas Harte
68ba73bee0 Ensures I get some sort of feedback for non-text modes. 2020-11-15 17:16:52 -05:00
Thomas Harte
cdacf280e1 After much extra logging, corrects destination bank for MVN and MVP. 2020-11-15 16:08:29 -05:00
Thomas Harte
1538a02e18 Better explains concern. 2020-11-14 19:27:20 -05:00
Thomas Harte
f9cec9a102 Attempts also to implement 1Mhz access costs. 
Subject to TODO, and same observation as before: this is as to my current understanding only.
 2020-11-14 19:23:01 -05:00
Thomas Harte
adda3d8f42 Attempts a 'full' model of 2.8Mhz access timing. 
i.e. full to my current understanding.
 2020-11-14 19:10:41 -05:00
Thomas Harte
ec3ff0da12 Steps towards proper calculation of time. 2020-11-14 18:39:16 -05:00
Thomas Harte
73c38b3b0d Collapses nested conditionals. 2020-11-14 18:23:31 -05:00
Thomas Harte
edc8050b36 Adds activity indicators. 2020-11-14 18:00:06 -05:00
Thomas Harte
715a1b9cd6 Ensures safe shutdown. 2020-11-12 21:44:51 -05:00
Thomas Harte
86310849eb Corrects IWM clocking. 2020-11-12 18:09:31 -05:00
Thomas Harte
a2a928e262 Takes a guess at the format of IIgs .po files; wires them through to the actual machine. 
... which still declines to boot.
 2020-11-12 18:01:26 -05:00
Thomas Harte
3813e00ca3 Adds the Apple II toggle speaker. 2020-11-11 21:04:38 -05:00
Thomas Harte
5698aa6499 Corrects colour mapping and improves documentation for self. 2020-11-11 20:41:30 -05:00
Thomas Harte
a15af1df5e Attempts to use the other bit of disk drive control, the 5.25"/3.5" select. 
For the record, the ROM thinks it finds some Smartport devices and then attempts to talk to them. Since none is present, it blocks forever.
 2020-11-11 17:55:50 -05:00
Thomas Harte
da9e378ab1 Quietens, for now. 2020-11-11 17:53:21 -05:00
Thomas Harte
8024bbd721 Provides minor extra detail. 2020-11-11 17:08:56 -05:00
Thomas Harte
ece9382a4e Also attaches IWM select line. 2020-11-10 18:59:23 -05:00
Thomas Harte
6ba517a4c1 Applies a will-do-for-now crop to video output. 2020-11-10 18:50:23 -05:00
Thomas Harte
20fd5adb24 Makes a first effort at attaching an IWM. 2020-11-10 18:38:23 -05:00
Thomas Harte
abb350ff5b Stubs in audio toggle and disk control. 
It appears that ROM 01 now fails because reading the disk interface register doesn't do as expected. ROM 03 starts hitting what should be the IWM and dies in a surplus of logging.
 2020-11-09 22:21:52 -05:00
Thomas Harte
dc8d4d49f5 Gives the two sets of switches responsibility for supplying 'state'. 
(And fixes language-card state value.)
 2020-11-09 22:11:20 -05:00
Thomas Harte
54352cb1cb Stubs in a couple more registers. 
PC now hits $0000. Likely a bug.
 2020-11-09 21:54:25 -05:00
Thomas Harte
7e106c6add Attempts to stub in read from microcontroller, and extends command 0x06. 
A complete guess on the latter, as if you didn't know.
 2020-11-09 21:20:53 -05:00
Thomas Harte
0ae49b356a Seems to do enough padding out to get me to my second failing ADB command. 
That's better than failing at the first.
 2020-11-09 19:05:48 -05:00
Thomas Harte
32374444ba Fixes text output window. 2020-11-08 17:04:04 -05:00
Thomas Harte
287bfeb924 Hacks in 40-column text. 
Hot gossip: my IIgs is reporting a system error. A clue!
 2020-11-08 17:01:23 -05:00
Thomas Harte
81c38c7200 Per the IIgs tech note, this value works the other way around. 2020-11-07 23:15:07 -05:00
Thomas Harte
3bb3d8c5c1 Adds text colour register. 
Oddly this isn't currently being set. So probably another latent fault elsewhere.
 2020-11-07 23:14:50 -05:00
Thomas Harte
b57a2bfec9 Completes logic for pixel framing. Well, mostly; this doesn't yet allow for auxiliary-using II modes being off to the left. 
The perceived effect though is that a frame appears and then freezes. So a clocking issue may still be afoot.
 2020-11-07 22:23:48 -05:00
Thomas Harte
a51f4122f0 Attempts to respect border colour. 
Though for now my display is just a sea of purple.
 2020-11-07 22:03:05 -05:00
Thomas Harte
35ba5fc894 Resolves video timing issues. 2020-11-07 21:28:08 -05:00
Thomas Harte
228d901253 Attempts to stabilise image horizontally. 2020-11-07 21:10:05 -05:00
Thomas Harte
d37ba62343 Makes first, faltering steps towards video display. 2020-11-07 20:42:34 -05:00
Thomas Harte
699fb0aa4b Switches to just-in-time video, for easy access to a clock divider. 2020-11-07 19:40:26 -05:00
Thomas Harte
613d4b7c8b Migrates character ROM handling; supplies one for the IIgs. 2020-11-07 17:45:03 -05:00
Thomas Harte
6b29e1f598 Corrects accesses to switch values. 2020-11-05 21:25:06 -05:00
Thomas Harte
6c9edbb7a2 Resolves specious interrupts.dic 2020-11-05 20:51:00 -05:00
Thomas Harte
282d0f1ebb For debugging, adds a dump of anything in the [presumably] text buffer. 
Nothing is there.
 2020-11-05 18:17:21 -05:00
Thomas Harte
f466cbadec Attempts to do just enough with video to get a functioning vertical blank query. 2020-11-05 17:56:20 -05:00
Thomas Harte
46ee98639e Stubs in $c010. 
Also reduces memory map logging.
 2020-11-04 21:35:11 -05:00
Thomas Harte
cc6c0d535c Stubs in some of the sound GLU registers. 2020-11-04 21:29:44 -05:00
Thomas Harte
78b57e73d5 Hacks in a lying vertical blank value. 2020-11-04 21:18:27 -05:00
Thomas Harte
9e2a6526d1 Corrects interpretation of bit 3 of the state register. 
And attempts to be a bit more careful with the language card in general.
 2020-11-04 21:15:10 -05:00
Thomas Harte
d3c7253981 Shifts size-limiting of X and Y to transitions and mutations, away from reads. 
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
 2020-11-04 20:35:41 -05:00
Thomas Harte
0178aaee2b Attempts retroactively to enforce the rule that 8-bit index modes => no top byte. 
(Rather than a preserved but ignored top byte)
 2020-11-02 18:55:28 -05:00
Thomas Harte
53f60f7c87 Adds some notes for a pending ADB implementation. 2020-11-01 14:49:04 -05:00
Thomas Harte
2da71acefd Stubs in the ADB GLU. 2020-10-31 21:00:15 -04:00
Thomas Harte
45f5896b76 Stubs video switches into the IIgs. 2020-10-31 20:39:32 -04:00
Thomas Harte
531a3bb7e6 Ensures RAM is zero-initialised, for now, to aid in repeatable bug finding. 2020-10-31 20:03:23 -04:00
Thomas Harte
1b28d929e4 Factors out the Apple II/IIe video switches and mode selection logic. 2020-10-31 20:02:50 -04:00
Thomas Harte
e4459b6256 Adds power-on bit to speed register. 2020-10-30 21:50:39 -04:00
Thomas Harte
2be817a6a1 Maps in "the interrupt ROM addresses". 2020-10-30 21:42:43 -04:00
Thomas Harte
a833bb892b Increases logging substantially. 2020-10-30 20:11:55 -04:00
Thomas Harte
0d562699a2 Ensures unmapped regions are really unmapped. 2020-10-29 22:18:01 -04:00
Thomas Harte
034056d0cd Adds full 8-bit clock addressing; stubs clock into the IIgs. 2020-10-29 21:38:36 -04:00
Thomas Harte
1249fb598b Factors Apple's RTC out of the Macintosh. 2020-10-29 21:03:02 -04:00
Thomas Harte
5a8b8478d2 Corrects unhandled IO assert. 
The IIgs proper is actually waiting on communication with the RTC.
 2020-10-28 22:14:02 -04:00
Thomas Harte
6c54699c44 Connects up an SCC. 
Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
 2020-10-28 22:07:34 -04:00
Thomas Harte
94a6da6b7d Exposes much of the auxiliary and language card stuff to the IIgs bus. 2020-10-28 21:58:20 -04:00
Thomas Harte
885fae1534 Stubs in a speed register. 2020-10-28 21:23:45 -04:00
Thomas Harte
1e4679ae14 Corrects JSL and RTL. 2020-10-28 17:25:40 -04:00
Thomas Harte
267dd59a59 Gets as far as seemingly yet another memory-map setting. 
Tomorrow, maybe?
 2020-10-27 22:31:58 -04:00
Thomas Harte
0a91ac5af5 Adds some extra notes, starts getting into trying to run the IIgs. 2020-10-27 22:09:45 -04:00
Thomas Harte
ad93ad6018 Attempts to finish off shadowing. 2020-10-27 22:05:04 -04:00
Thomas Harte
0c700094ea Goes branchless on shadowing. 2020-10-27 21:56:03 -04:00
Thomas Harte
20631a157b Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage. 2020-10-27 21:37:39 -04:00
Thomas Harte
e44f95a882 Takes a first, faltering shot at shadowing. 2020-10-27 19:49:47 -04:00
Thomas Harte
31cd45f8b5 Takes a run at set_card_paging and simplifies method of shadowing. 2020-10-27 19:33:47 -04:00
Thomas Harte
74f9f6ad3b Tests and corrects ROM access beyond bank $00. 2020-10-27 19:02:15 -04:00
Thomas Harte
1dfdb51e61 Hits a few other easy cases. 
Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
 2020-10-26 21:49:47 -04:00
Thomas Harte
18832dc19d Attempts to expand the language card stuff to all affected pages. 2020-10-26 20:30:41 -04:00
Thomas Harte
3dee0666cb Corrects current bank $00 language card behaviour. 2020-10-26 17:46:40 -04:00
Thomas Harte
f830f6a57a Adds failing test of initial ROM mirroring. 
It's the end of the evening, so this is it for today.
 2020-10-25 22:13:54 -04:00
Thomas Harte
82c733c68c Adds some very basic actual tests. 2020-10-25 21:40:50 -04:00
Thomas Harte
ed510409c4 Starts memory map test class, already finding a typo. 2020-10-25 21:31:21 -04:00
Thomas Harte
7614eba4bf Factors out the IIgs memory map logic. 
As testing would be rational.
 2020-10-25 21:10:04 -04:00
Thomas Harte
13c8032465 ROM isn't writeable. The clue is in the name. 2020-10-25 18:29:17 -04:00
Thomas Harte
44fc08cd5b Switches to a mapping system that supports non-continuous regions, and is smaller. 2020-10-25 18:28:32 -04:00
Thomas Harte
7631b11c55 Corrects double low-res colour serialisation. 2020-10-24 19:26:32 -04:00
Thomas Harte
726b5f62bb Corrects read/write access to auxiliary soft switches. 2020-10-24 19:00:03 -04:00
Thomas Harte
ddd84db510 Edges towards a functioning IIgs memory map. 
Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
 2020-10-23 19:41:10 -04:00
Thomas Harte
966241b4cc Adds documentation, ensures the language card signals less noisily. 2020-10-23 18:44:47 -04:00
Thomas Harte
9371a8993f Factors out auxiliary memory switches and related decisions. 2020-10-22 22:33:31 -04:00
Thomas Harte
410c99de54 Factors out the language card memory selection logic. 2020-10-22 21:01:12 -04:00
Thomas Harte
817f93a490 Edges towards a working memory subsystem. At least structurally. 2020-10-22 19:25:04 -04:00
Thomas Harte
43611792ac Adds just enough to get a 65816 ticking over. 2020-10-21 21:19:18 -04:00
Thomas Harte
62231708d7 read_pages_ can be const. 2020-10-21 21:17:15 -04:00
Thomas Harte
5287c57ee0 Adds the IIgs as a user-selectable machine. 
Albeit that there is no underlying machine yet.
 2020-10-20 22:18:11 -04:00
Thomas Harte
1fa94e1b08 Adds the 65816 as an in-code option for Oric emulation. 
This also means it'll be exposed via the SDL build, but that's okay.
 2020-10-18 21:43:08 -04:00
Thomas Harte
5dcf720bb5 Extends list of BusOperations. 
Now to retest, widely.
 2020-10-15 21:35:01 -04:00
Thomas Harte
ef1a514785 Introduces 6502Selector, for picking either a 6502 or a 65816 based on a single template parameter. 2020-09-28 21:35:46 -04:00
Thomas Harte
5651ef606d Resolves failure to advance video address when output is blocked. 2020-09-15 22:20:06 -04:00
Thomas Harte
e113780fd1 Minor: ensures no possibility of a dangling(-ish) pointer within the Mac video. 2020-09-10 22:13:19 -04:00
Thomas Harte
e32ae6c191 Adds UGLY HACKs to workaround uncovered issues in the OpenGL scan target. 2020-09-10 22:10:24 -04:00
Thomas Harte
3597f687de Continues sidling towards composite & S-Video handling. 2020-08-19 21:20:06 -04:00
Thomas Harte
5c836604c0 Reenable MaserSystem code. 
Accidental/poor branch management is evidenced here.
 2020-08-04 21:50:54 -04:00
Thomas Harte
e235a45abb Breaks all output. 
... by switching out NSOpenGLView for MKLView with no drawing infrastructure yet in place.
 2020-08-04 18:22:14 -04:00
Thomas Harte
9410594486 Merge branch 'master' into LockFreeQueue 2020-07-29 21:22:19 -04:00
Thomas Harte
82d6a5387f Gives Qt disk controllers independent ROM/RAM selection logic. 
In particular, this fixes the Microdisc.
 2020-07-29 21:06:41 -04:00
Thomas Harte
1942742d73 Resolves thread data race on Macintosh audio output. 2020-07-28 22:21:52 -04:00
Thomas Harte
cbb0594e6b Use 16-sector state machine even with the 13-sector boot ROM. 
I think I've proven that the Disk II doesn't decode the 13-sector state machine correctly. Work to do there.
 2020-07-16 23:27:27 -04:00
Thomas Harte
e1c57b6fbe Further ensures both ZX80 and ZX81 functionality. 2020-07-14 23:45:51 -04:00
Thomas Harte
371c26251c Switches strategy for the ZX80. 2020-07-14 22:36:04 -04:00
Thomas Harte
645d198bee Causes ZX80 and ZX81 software that doesn't already autorun to do so. 2020-07-14 22:17:56 -04:00
Thomas Harte
478d081095 Ensures machines take user-friendly default settings. 2020-06-23 23:27:56 -04:00
Thomas Harte
7af8646470 Allowing for the constexpr, this is maybe_unused. 2020-06-19 23:47:43 -04:00
Thomas Harte
2477752fa4 Adds further [[fallthrough]] attributes. 2020-06-19 23:36:51 -04:00
Thomas Harte
59458f6444 Resolves errant spaces. 2020-06-16 23:15:38 -04:00
Thomas Harte
495024d6fe Cleans up all redundant lock/unique_guard declarations. 2020-06-15 00:24:10 -04:00
Thomas Harte
f215405beb Corrects capitalisation errors. 2020-06-02 23:27:29 -04:00
Thomas Harte
73131735fa Further qmake warning corrections. 2020-05-30 19:31:17 -04:00
Thomas Harte
48afc54af6 Cuts down unused parameter warnings to just a few that may well indicate implementation errors. 2020-05-30 01:06:43 -04:00
Thomas Harte
267006782f Starts to add Qt target; resolves many build warnings. 2020-05-30 00:37:06 -04:00
Thomas Harte
512a52e88d Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style. 2020-05-20 23:34:26 -04:00
Thomas Harte
66c2eb0414 Further tightens const and constexpr usage. 2020-05-12 22:22:21 -04:00
Thomas Harte
8596a9826f Whether the BIOS is available in hardware is now decided entirely based on whether it is on disk. 2020-05-12 00:11:46 -04:00
Thomas Harte
81d70ee325 Adds in a few further consts. 2020-05-09 23:49:37 -04:00
Thomas Harte
05c3f2a30d Adds some further `costs. 2020-05-09 23:03:33 -04:00
Thomas Harte
25996ce180 Further doubles down on construction syntax for type conversions. 2020-05-09 23:00:39 -04:00
Thomas Harte
4136428db3 Removes dead StandardOptions.cpp. 2020-05-09 21:35:15 -04:00
Thomas Harte
31c6faf3c8 Adds a bunch of consts. 2020-05-09 21:23:52 -04:00
Thomas Harte
40b60fe5d4 Renames folder as per intended scope. 2020-05-09 18:04:11 -04:00
Thomas Harte
eed357abb4 Introduces concept of 'average peak volume' in order better to normalise audio sources like the OPLL. 2020-05-09 17:57:21 -04:00
Thomas Harte
386a7ca442 Continues doing away with the attempt heavily to interleave the OPLL and OPL2, creating a new OPLL class. 2020-05-04 21:14:51 -04:00
Thomas Harte
1f34214fb3 Imagines a future of being able to boot into the BIOS. 2020-04-29 22:07:20 -04:00
Thomas Harte
6ebc93c995 Switches to maximum-rate multiplexing. Hopefully to eliminate the mixer as a consideration for now. 2020-04-24 23:50:06 -04:00
Thomas Harte
0ac99e8d42 Disables low low-pass filter, honours audio control bits for better volume usage. 2020-04-21 19:57:13 -04:00
Thomas Harte
6568c29c54 Improves commentary. 2020-04-19 22:42:25 -04:00
Thomas Harte
559a2d81c1 Baby step: starts trying to output the raw FM carrier, no modulation, no ADSR. 2020-04-12 12:46:40 -04:00
Thomas Harte
dd6769bfbc Splits OPLL and OPL2 classes. 
Logic is: they have different mixers (additive in the OPL2, time-division multiplexing in the OPLL) as well as different register sets. So I'll put operator and channel logic directly into those structs.
 2020-04-07 23:15:26 -04:00
Thomas Harte
b0abc4f7bb Implements enough wiring that the Master System will instantiate and talk to an OPLL. 2020-04-03 20:05:36 -04:00
Thomas Harte
fe3942c5b3 Updates comments. 2020-04-01 23:49:07 -04:00
Thomas Harte
f417fa82a4 Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine. 
Simultaneously cleans up some of the naming conventions and tries to make things a bit more template-compatible.
 2020-04-01 23:19:34 -04:00
Thomas Harte
7a12a0149a Ensures BIOS is really not paged if not loaded. 2020-03-23 20:00:31 -04:00
Thomas Harte
69277bbb27 Renames files to match project convention. 2020-03-19 23:24:06 -04:00
Thomas Harte
7ab7efdbc1 Ensures consistent ordering. 2020-03-19 19:41:50 -04:00
Thomas Harte
b8ebdc012f Ensure normative construction declaration ordering. 2020-03-19 18:58:36 -04:00