Thomas Harte
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0b9ebafc0f
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Flip bit deserialisation order.
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2021-09-28 22:12:13 -04:00 |
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Thomas Harte
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140e24ef15
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Grab further copy flags.
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2021-09-28 22:11:58 -04:00 |
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Thomas Harte
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0c998d60cb
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Correct test logic for line draws that repeatedly write to the same address.
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2021-09-28 21:45:55 -04:00 |
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Thomas Harte
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ffcd2ea10c
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Attempts more properly to implement line mode.
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2021-09-28 21:39:09 -04:00 |
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Thomas Harte
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cb460de94d
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Makes bad first attempt at a Bresenham inner loop.
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2021-09-27 22:06:00 -04:00 |
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Thomas Harte
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f6624bf776
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Edges mildly closer to line output.
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2021-09-26 19:18:12 -04:00 |
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Thomas Harte
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b4b6c4d86f
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Attempts to support left and right masks.
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2021-09-26 18:42:08 -04:00 |
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Thomas Harte
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759689ff31
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Fix line mode flag, add busy status.
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2021-09-26 18:16:00 -04:00 |
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Thomas Harte
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1dfc36f311
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Flip loop, add modulo mappings.
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2021-09-26 18:15:32 -04:00 |
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Thomas Harte
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1c03ff1d37
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Fix bltdptl to bltbptl misstatement; remove pre-DMA writes.
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2021-09-26 18:14:50 -04:00 |
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Thomas Harte
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19dd2f92bd
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Implements test case. Failing at present, naturally.
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2021-09-25 21:52:41 -04:00 |
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Thomas Harte
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acfaa016a0
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Adds a capture of traffic leading up to the Workbench boot logo.
Around which to construct a test case.
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2021-09-25 18:10:07 -04:00 |
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Thomas Harte
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732761433a
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Merge branch 'master' into HeaderOnly6502
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2021-09-23 23:00:11 -04:00 |
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Thomas Harte
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9012a7f5e1
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Merge branch 'master' into Amiga
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2021-09-23 23:00:03 -04:00 |
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Thomas Harte
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e957b471b2
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Merge pull request #989 from TomHarte/Xcode13
Resolves Clang 13 implicit conversion warnings.
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2021-09-23 22:59:42 -04:00 |
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Thomas Harte
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e5a5faa417
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Resolves Clang 13 implicit conversion warnings.
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2021-09-23 22:53:41 -04:00 |
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Thomas Harte
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313dbe05e0
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Switch to more consistent inlining.
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2021-09-23 22:36:15 -04:00 |
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Thomas Harte
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adf7124e2c
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Eliminate 6502Base.cpp.
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2021-09-23 22:33:33 -04:00 |
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Thomas Harte
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c4ab2bbeed
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Hard-code fetch window width. For now.
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2021-09-23 22:06:13 -04:00 |
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Thomas Harte
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42ef459e20
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Resolve resting values.
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2021-09-23 22:05:59 -04:00 |
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Thomas Harte
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cad1a9e0f1
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Correct bit test.
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2021-09-23 20:42:31 -04:00 |
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Thomas Harte
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f1d514470d
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Add note to future self.
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2021-09-23 20:29:39 -04:00 |
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Thomas Harte
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9a7a54f22f
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Take alternative guess as to meaning of 'use' bits.
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2021-09-23 18:42:12 -04:00 |
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Thomas Harte
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137d1c61bd
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Allow for channel enables and blitting direction.
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2021-09-23 18:38:37 -04:00 |
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Thomas Harte
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adc071ed7a
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Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.
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2021-09-23 18:30:35 -04:00 |
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Thomas Harte
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e06f470044
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Ensure no implicit conversion from int to IntT.
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2021-09-23 18:30:04 -04:00 |
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Thomas Harte
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ab69fe56c9
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Take a first shot at magical instant blitting.
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2021-09-23 18:13:51 -04:00 |
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Thomas Harte
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60bad22a91
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Correct fetch window.
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2021-09-23 18:13:24 -04:00 |
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Thomas Harte
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7092429f7c
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Added some notes to self on line mode.
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2021-09-20 23:08:26 -04:00 |
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Thomas Harte
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fa800bb809
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Introduces code for minterm application.
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2021-09-20 19:13:23 -04:00 |
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Thomas Harte
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e15f1103a0
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Takes a shot at low resolution shifting.
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2021-09-20 19:00:52 -04:00 |
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Thomas Harte
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a4263b5a8c
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Ties bitplane collection to line position.
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
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2021-09-19 21:55:45 -04:00 |
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Thomas Harte
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3d85f820f4
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Add missing file to kiosk project.
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2021-09-16 21:29:11 -04:00 |
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Thomas Harte
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245b7baa61
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Moves the Copper into its own file.
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2021-09-16 21:17:23 -04:00 |
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Thomas Harte
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0eeaaa150a
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Correct Copper start address.
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2021-09-16 21:01:37 -04:00 |
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Thomas Harte
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692d87f446
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Attempts to restrict blitter slot allocation.
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2021-09-16 19:56:28 -04:00 |
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Thomas Harte
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6572efe2a7
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Clarifies word addressing.
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2021-09-16 08:24:52 -04:00 |
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Thomas Harte
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8aac2bd029
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Stubs in serial port status.
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2021-09-14 21:53:07 -04:00 |
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Thomas Harte
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add11db369
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Factors out DMADevice, which is now a parent of Blitter.
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2021-09-14 20:51:32 -04:00 |
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Thomas Harte
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e47eab1d40
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Merge branch 'master' into Amiga
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2021-09-14 20:27:59 -04:00 |
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Thomas Harte
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2f86dfdf2b
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Merge pull request #987 from TomHarte/IIgsImprovements
Further iterates the IIgs towards full functionality.
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2021-09-14 20:27:25 -04:00 |
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Thomas Harte
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fa71ae3174
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Add apology.
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2021-09-14 20:23:36 -04:00 |
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Thomas Harte
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dfcd1508c9
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Establishes valid initial BRAM.
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2021-09-10 19:56:20 -04:00 |
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Thomas Harte
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0ca4631279
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Switch to zero-initialised state; be more careful about resetting data.
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2021-09-09 23:08:13 -04:00 |
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Thomas Harte
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7e5fc4444a
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Default to ROM01.
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2021-09-09 22:09:09 -04:00 |
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Thomas Harte
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a6221ca322
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Reload data only if an output is found.
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2021-09-09 22:07:03 -04:00 |
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Thomas Harte
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d8e42c4379
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Tweak guess at initial state.
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2021-09-09 22:06:36 -04:00 |
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Thomas Harte
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3bf109ae0b
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Merge pull request #986 from TomHarte/IIgsSync
Stabilises Apple IIgs display.
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2021-09-09 20:14:40 -04:00 |
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Thomas Harte
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dd37fa49a0
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Stabilises Apple IIgs display.
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2021-09-09 20:08:15 -04:00 |
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Thomas Harte
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3227ec72a2
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Merge branch 'master' into Amiga
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2021-09-08 21:08:47 -04:00 |
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