87 Commits

Author	SHA1	Message	Date
Thomas Harte	169298af42	Plumb through disk insertion. ... Surprisingly: some things now load.	2024-04-08 21:15:40 -04:00
Thomas Harte	4f58664f97	Catch interrupt enables.	2024-04-07 22:08:12 -04:00
Thomas Harte	d2b077c573	Start wiring in a floppy controller.	2024-04-07 21:22:35 -04:00
Thomas Harte	543b1c644a	Wire mouse events to the relevant class.	2024-04-06 13:32:59 -04:00
Thomas Harte	3f40e409c5	Reduce debugging heft.	2024-04-04 22:16:11 -04:00
Thomas Harte	7d8a364658	Reimplement LDM and STM.	2024-04-04 21:59:18 -04:00
Thomas Harte	609c117267	Switch to English RISC OS.	2024-04-01 21:44:42 -04:00
Thomas Harte	914b88d115	Fix non-debug build.	2024-03-31 19:17:55 -04:00
Thomas Harte	cc122a7a68	Add an SWI count, to aid in logging.	2024-03-31 18:18:26 -04:00
Thomas Harte	31979649c6	As it continues to swell, factor out the junk.	2024-03-31 18:15:48 -04:00
Thomas Harte	335d13d06d	Mildly improve logging, define a few more ROMs.	2024-03-30 21:49:21 -04:00
Thomas Harte	ec785f3a8a	Add URL as comment.	2024-03-30 20:54:17 -04:00
Thomas Harte	1f83a5425e	Complete list of all currently-failing SWIs. ... ... a lot of which are probably failing correctly, i.e. they're appropriately signalling.	2024-03-30 20:48:47 -04:00
Thomas Harte	4882d6d0f2	Start adding SWI detail.	2024-03-30 15:16:48 -04:00
Thomas Harte	722743659b	Add missing space.	2024-03-29 21:52:57 -04:00
Thomas Harte	6e64a79b52	Log failed SWIs.	2024-03-29 21:31:33 -04:00
Thomas Harte	8a6bf84cff	Keyboard: log more, ignore unrecognised commands.	2024-03-29 20:54:07 -04:00
Thomas Harte	f175dcea58	Hack in some more potential debugging help.	2024-03-27 22:37:37 -04:00
Thomas Harte	f46af4b702	OS 3.11 seems to be able to get into BASIC.	2024-03-25 22:10:35 -04:00
Thomas Harte	d2776071e4	Speed up debug mode.	2024-03-25 21:31:33 -04:00
Thomas Harte	72a645ec1e	Fix trans; take further crack at MEMC permissions.	2024-03-25 15:50:59 -04:00
Thomas Harte	1154ffd072	Add a 'drive in use' indicator LED.	2024-03-25 15:03:54 -04:00
Thomas Harte	8ba9708942	Hopefully resolve the mystery of the latch writes.	2024-03-25 14:54:30 -04:00
Thomas Harte	521fca6089	Expose full bus to IOC dependents; add notes.	2024-03-25 11:07:44 -04:00
Thomas Harte	6980fd760c	Add further heavily-manual debugging aids.	2024-03-24 22:18:30 -04:00
Thomas Harte	5ccb18225a	Provide key states to the keyboard.	2024-03-23 15:43:04 -04:00
Thomas Harte	9ea3e547ee	Fix IRQ/FIQ return addresses.	2024-03-22 21:42:34 -04:00
Thomas Harte	fb5fdc9f10	Actually apply video divider.	2024-03-22 10:24:24 -04:00
Thomas Harte	ae6cf69449	Move responsibility for clock division; reinstate vsync interrupt.	2024-03-22 10:01:34 -04:00
Thomas Harte	2de1a2dd0d	Install and properly clock a CRT.	2024-03-21 20:41:24 -04:00
Thomas Harte	40b5227f0b	Deliver all addresses to the video outputter.	2024-03-21 11:24:47 -04:00
Thomas Harte	2d6a4d490e	Add dummy retrace interrupt.	2024-03-21 10:02:56 -04:00
Thomas Harte	208f3e24de	Audio ticks are now included.	2024-03-20 14:30:21 -04:00
Thomas Harte	1341816791	Break apart, switching to delegates for interrupts.	2024-03-20 14:26:56 -04:00
Thomas Harte	08673ff021	Switch to macro blocks of execution; flail around audio.	2024-03-20 11:42:37 -04:00
Thomas Harte	3a2d9c6082	Give user access to ROM; clean up a touch.	2024-03-19 20:26:17 -04:00
Thomas Harte	43a3959b8f	Don't data abort on missing low ROM.	2024-03-19 15:06:01 -04:00
Thomas Harte	85a738acff	Get rigorous on exception addresses.	2024-03-19 15:03:31 -04:00
Thomas Harte	2ad6bb099b	Begin foray into disassembly.	2024-03-19 11:34:10 -04:00
Thomas Harte	9d858bc61b	IRQ and FIQ should also store PC+4.	2024-03-18 14:08:08 -04:00
Thomas Harte	612c9ce49a	Transfer logging responsibility.	2024-03-18 11:09:29 -04:00
Thomas Harte	7b1f800387	Extend I2C state machine.	2024-03-17 21:55:19 -04:00
Thomas Harte	47e9279bd4	Add a target for I2C activity.	2024-03-16 15:00:23 -04:00
Thomas Harte	635efd0212	Clear keyboard interrupts.	2024-03-15 23:19:26 -04:00
Thomas Harte	1c1d2891c7	Adjust IRQ/FIQ return addresses.	2024-03-15 21:59:38 -04:00
Thomas Harte	1979d2e5ba	Don't set interrupt flags before capture.	2024-03-15 21:34:39 -04:00
Thomas Harte	3a899ea4be	Add test coverage for STM descending, proving nothing.	2024-03-15 14:55:17 -04:00
Thomas Harte	9d08282e28	Add enough of a keyboard to respond to reset.	2024-03-15 10:57:18 -04:00
Thomas Harte	18154278d1	Add minor note on where next.	2024-03-14 21:54:20 -04:00
Thomas Harte	bc27e3998d	Fix downward block data transfers.	2024-03-14 21:09:51 -04:00