Thomas Harte
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d9071ee9f1
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Starts sketching out the asynchronous bus.
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2019-04-29 13:45:53 -04:00 |
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Thomas Harte
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7df85ea695
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Cleans up and formally introduces a comparative source for QL startup.
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2019-04-25 15:42:41 -04:00 |
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Thomas Harte
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a08043ae88
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Ensures that MOVE.b #, (xxx).l writes only a byte.
Also rearranges some of the temporary logging functionality.
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2019-04-23 19:01:58 -04:00 |
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Thomas Harte
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6d6046757d
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Fixes predecrementing MOVEM to leave the proper address in the relevant register.
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2019-04-22 15:41:09 -04:00 |
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Thomas Harte
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44eb4e51ed
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Ensures DBcc properly signals program fetches.
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2019-04-21 22:54:20 -04:00 |
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Thomas Harte
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3cb042a49d
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Corrects the carry and extend flags for various long-word operations.
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2019-04-21 22:08:18 -04:00 |
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Thomas Harte
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0be9a0cb88
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Corrects Scc (and other conditionals) for complex addressing modes.
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2019-04-20 18:35:19 -04:00 |
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Thomas Harte
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ef33b004f9
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Corrects word access order of MOVEM.l.
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2019-04-20 15:13:12 -04:00 |
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Thomas Harte
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2cac4b0d74
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Corrects EA usage for ADDA and SUBA.
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2019-04-19 23:02:41 -04:00 |
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Thomas Harte
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a49f516265
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Corrects direction of MOVE [to/from] USP.
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2019-04-19 22:41:06 -04:00 |
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Thomas Harte
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c265ea9847
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Corrects byte writes in both test machines.
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2019-04-17 16:39:10 -04:00 |
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Thomas Harte
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b64da2710a
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Corrects a few MOVE #s.
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2019-04-17 10:00:14 -04:00 |
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Thomas Harte
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82b08d0e3a
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Corrects addressing behaviour of nRd[+-].
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2019-04-17 08:53:34 -04:00 |
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Thomas Harte
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62e4c23961
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Corrects memory map, causing the RAM test no longer to fail.
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2019-04-15 13:03:32 -04:00 |
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Thomas Harte
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a223cd90a1
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Adds predecrement TSTs, increases QL running time, reduces logging.
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2019-04-15 12:36:08 -04:00 |
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Thomas Harte
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fba210f7ce
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Corrects MOVE.l Dn, (An)[+].
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2019-04-15 09:30:49 -04:00 |
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Thomas Harte
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52e33e861c
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Starts to introduce the QL as a second source for 68000 testing.
It's advantageous over the ST in that a commented disassembly of the ROM is available.
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2019-04-14 22:15:09 -04:00 |
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