Thomas Harte
f05cdd5e34
With large swathes of implementation missing, compiles.
2021-06-03 22:39:18 -04:00
Thomas Harte
a30eeaab6a
Starts to introduce a new grammar for ROM requests.
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They can be optional, and chained together in AND or OR combinations. A central catalogue knows the definitions of all ROMs.
2021-06-03 21:55:59 -04:00
Thomas Harte
b4a5fa33b0
Improve SDL failed-ROM reporting.
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Specifically to include all paths tried, and not use the plural for 'crc32' when only one is present.
2021-05-30 19:40:29 -04:00
Thomas Harte
5483f979dc
Merge branch 'master' into DragAndDropState
2021-05-16 20:42:44 -04:00
Thomas Harte
50ea56e908
Adds support for Macintosh SCSI device images.
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This is now in addition to the single-partition images previously supported.
2021-05-13 19:06:00 -04:00
Thomas Harte
8268e8ee4c
Ensures music survives a machine switch.
2021-05-08 20:46:17 -04:00
Thomas Harte
c2ff64c1e0
Removes dangling OpenGL reference, attempts to ensure audio handover upon a machine change.
2021-05-08 14:42:43 -04:00
Thomas Harte
4db792591a
macOS: ensure activity and options panels change upon a drag-and-drop state.
2021-05-08 14:35:57 -04:00
Thomas Harte
20c814a4dd
Factors out boilerplate around full-device sector images.
2021-05-01 21:10:46 -04:00
Thomas Harte
6a052e1900
Starts working on SDL drag-and-drop support for snapshots.
2021-04-30 22:56:13 -04:00
Thomas Harte
cecdf8584a
Ensures proper propagation of will_change_owner.
2021-04-30 22:51:26 -04:00
Thomas Harte
4758bc8615
Attempts to support insertion of states into existing windows.
2021-04-30 21:37:41 -04:00
Thomas Harte
ad10d0037a
Inverts the Game Controller Framework value of the y axis.
2021-04-28 20:31:35 -04:00
C.W. Betts
2fd08789ab
Xcode maintenance.
2021-04-27 12:50:26 -06:00
Thomas Harte
b7a62e0121
Adds SZX support.
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Tweaking exposed Spectrum state object as relevant.
2021-04-26 20:47:28 -04:00
Thomas Harte
03577de675
Adds an empty vessel for .z80 support.
2021-04-25 16:54:34 -04:00
Thomas Harte
cc78bfb229
Forwards most of the Z80 state.
2021-04-25 13:00:43 -04:00
Thomas Harte
d61f478a39
Basic sketch for state snapshots: an extra field on Target.
...
I think it doesn't make sense for states to own a target as that complicates the concept of Media. Plus they're distinct because it makes sense to have only one per Target. Let's see how this pans out.
2021-04-24 23:17:47 -04:00
Thomas Harte
37dcf61130
Add timing tests, fix +3 discrepancy.
2021-04-23 22:29:57 -04:00
Thomas Harte
db52f13c32
Disambiguates reset_all_keys.
2021-04-19 21:49:06 -04:00
Thomas Harte
5667dcac36
Increases warnings, cleans up a touch.
2021-04-19 21:28:12 -04:00
Thomas Harte
e4d9022d37
Returns deployment target to 10.13.
2021-04-19 20:57:56 -04:00
Thomas Harte
572be48f38
Attempts to add an early exit for non-Metal Macs.
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This will be necessary only prior to 10.14.
2021-04-19 20:55:25 -04:00
Thomas Harte
0af405aa46
Starts working in the 48kb and 128kb Spectrums.
2021-04-14 21:37:10 -04:00
Thomas Harte
a1511f9600
Establishes that the 48/128kb contention patterns can be derived from my partial machine cycles alone.
2021-04-14 20:15:40 -04:00
Thomas Harte
68a04f4e6a
Adds IN/OUT I/D [R] to complete tests.
2021-04-13 22:00:24 -04:00
Thomas Harte
0d61902b10
Adds CP[I/D/IR/DR] tests.
2021-04-13 20:03:11 -04:00
Thomas Harte
3eec210b30
Adds LDI/LDD/LDIR/LDDR tests.
2021-04-13 20:00:29 -04:00
Thomas Harte
2e70b5eb9f
Advances to EX (SP), HL, leaving only [LD/CP/IN/OT][I/D]{R}.
2021-04-13 19:45:29 -04:00
Thomas Harte
8a3bfb8672
Adds an IN/OUT test.
2021-04-13 17:55:51 -04:00
Thomas Harte
06f1e64177
Advances to IO.
2021-04-12 21:41:20 -04:00
Thomas Harte
b42780173a
Establishes that there really is no Read4 and Read4Pre distinction.
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Will finish these unit tests, then clean up.
2021-04-12 20:54:10 -04:00
Thomas Harte
36c8821c4c
Reaches the halfway point in tests.
2021-04-12 17:29:03 -04:00
Thomas Harte
9347fe5f44
Advances to next failing test: LD (ii+n), n.
2021-04-12 17:11:58 -04:00
Thomas Harte
e82367def3
Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
2021-04-11 23:01:00 -04:00
Thomas Harte
47c5a243aa
Restructures, the better to explore errors.
2021-04-10 21:32:42 -04:00
Thomas Harte
070e359d82
Introduces failing test for BIT b, (ii+n).
2021-04-10 18:00:23 -04:00
Thomas Harte
400f54e508
Introduces failing test for bit b, (hl).
2021-04-10 12:04:48 -04:00
Thomas Harte
e0736435f8
Makes assumption that the address bus just holds its value during an internal operation.
2021-04-10 12:00:53 -04:00
Thomas Harte
b09c5538c6
Adds failing test for simple (ii+n) tests.
2021-04-09 21:28:35 -04:00
Thomas Harte
ce3d2913bf
Advances to 9 source table rows tested out of 37.
2021-04-09 20:38:17 -04:00
Thomas Harte
87202a2a27
Add two further tests, add checking of collected data size for all tests.
2021-04-09 18:32:03 -04:00
Thomas Harte
818a4dff25
Corrects ADD HL, dd test.
...
Or, at least, likely corrects. The bus cycle breakdown in the Z80 data sheet implies these accesses should come after completion of the refresh cycle, not during its long tail, so I think +1 is correct.
2021-04-08 22:23:15 -04:00
Thomas Harte
9e506c3206
Adds failing ADD hl, dd test.
2021-04-08 22:19:22 -04:00
Thomas Harte
50f53f7d97
Adds INC/DEC rr and LD SP, HL tests.
2021-04-08 22:14:53 -04:00
Thomas Harte
73fbd89c85
Correct opcodes, ability to terminate on a single-cycle contention.
2021-04-08 22:09:33 -04:00
Thomas Harte
f74fa06f2d
Introduces failing test for LD [A/I/R], [A/I/R].
2021-04-08 20:28:55 -04:00
Thomas Harte
ee989ab762
Fills in the rest of the simple two-byte instructions.
2021-04-08 20:13:52 -04:00
Thomas Harte
818655a9b6
Starts on two-bus-cycle instructions, correcting validators.
2021-04-08 20:01:46 -04:00
Thomas Harte
57a7e0834f
Corrects sampling of MREQ.
2021-04-08 19:21:35 -04:00
