Thomas Harte
7f62732476
Fixes kiosk target, accepts that I'll probably never add UI tests.
2021-01-23 21:59:21 -05:00
Thomas Harte
36aebe0ff9
Posts cycle lengths.
2021-01-23 21:58:52 -05:00
Thomas Harte
051d2b83f4
Corrects TSX lookup.
2021-01-23 15:45:21 -05:00
Thomas Harte
17b12120eb
Corrects bit-selection shifts.
2021-01-21 23:13:00 -05:00
Thomas Harte
6e9ce50569
Corrects duration-based iteration.
2021-01-21 23:05:43 -05:00
Thomas Harte
adef2e9b4e
Starts formalising end conditions.
2021-01-21 22:36:44 -05:00
Thomas Harte
0fafbf5092
Completes M50740 instruction set.
2021-01-21 19:08:38 -05:00
Thomas Harte
3c887aff95
Improves consistency.
2021-01-21 18:58:22 -05:00
Thomas Harte
e5076b295b
Corrects namespace.
2021-01-21 18:58:11 -05:00
Thomas Harte
c10c161d39
Implements ADC and SBC.
2021-01-21 18:53:24 -05:00
Thomas Harte
04024ca159
Adds BIT.
2021-01-20 21:41:43 -05:00
Thomas Harte
64d556f60f
Implements shifts and rotates.
2021-01-20 21:39:13 -05:00
Thomas Harte
8564e7406b
Corrects index-mode CMP, LDA.
2021-01-20 21:32:46 -05:00
Thomas Harte
ebdb58d790
Seemingly advances to the first indefinite loop.
2021-01-20 21:18:52 -05:00
Thomas Harte
cf8afc70b2
Takes a swing at BBC, BBS.
2021-01-20 20:52:04 -05:00
Thomas Harte
4f02e8fbaf
Knocks off the low-hanging instruction fruit.
2021-01-20 20:41:35 -05:00
Thomas Harte
6e618a6bb7
Adds a list of missing instructions.
...
Not looking too bad; subject to not yet having a strategy for interrupts, timing, nothing yet implemented for timers, IO ports...
2021-01-20 20:37:35 -05:00
Thomas Harte
df1bc18fb3
Pushes ahead to what will be my first interaction with the T flag.
2021-01-20 20:27:09 -05:00
Thomas Harte
9f12ce2fb8
Corrects RTS, adds the remainder of the direct flag manipulations.
2021-01-20 20:16:55 -05:00
Thomas Harte
b9672c0669
Gets beyond a prima facie convincing JSR/RET.
2021-01-20 18:21:44 -05:00
Thomas Harte
e58608b25a
Gets as far as executing a first loop.
2021-01-20 18:15:24 -05:00
Thomas Harte
e502d76371
Corrects immediate instruction length, muddles through to having to parse a second program segment.
...
Albeit with JSR not yet properly implemented.
2021-01-19 22:12:18 -05:00
Thomas Harte
b0c790f3c6
Adds enough flags seemingly to reach an ASL.
2021-01-19 21:54:15 -05:00
Thomas Harte
aa478cd222
Stops trying to force bit ID into the addressing mode.
2021-01-19 21:51:01 -05:00
Thomas Harte
c78c121159
Succeeds at executing a single instruction.
2021-01-18 20:16:01 -05:00
Thomas Harte
e71e506883
This assert is redundant; not worth an extra #include.
2021-01-18 17:56:40 -05:00
Thomas Harte
a601ac0cab
Corrects performer population, lookup, calls.
2021-01-18 17:53:14 -05:00
Thomas Harte
9b92753e0a
In theory this should 'execute' up to the first unconditional branch.
...
Where execution means: do very little.
2021-01-18 17:11:11 -05:00
Thomas Harte
ec0018df79
Routes in the ADB keyboard ROM. This should get as far as parsing.
2021-01-18 16:59:49 -05:00
Thomas Harte
8b19c523cf
Starts to bend towards getting some performers in motion.
2021-01-18 16:45:52 -05:00
Thomas Harte
5ace61f9b9
Continues walking very slowly towards cached execution.
2021-01-18 11:20:45 -05:00
Thomas Harte
8a74f5911c
Minor reorganisation to finish the day.
2021-01-17 21:56:15 -05:00
Thomas Harte
4982430a29
Takes a run at most of the remaining addressing modes.
2021-01-17 21:52:16 -05:00
Thomas Harte
dea79c6dea
Adds missing #include.
2021-01-17 20:56:22 -05:00
Thomas Harte
ad03858c6e
Switches performers to member functions. Very slightly starts work on M50740 performers.
2021-01-17 20:53:11 -05:00
Thomas Harte
54b26c7991
Bends to using 8-bit lookups for M50740 instructions.
2021-01-17 20:03:36 -05:00
Thomas Harte
17c3a3eb4b
Seeks to switch to maintaining a bank of performers.
...
My thinking here is that for really simple processors there'll be 256 or less, meaning that they can be stored by simple uint8_t; for every other processor I can currently think of it'll likely be uint16_t.
Either way, that's a much better outcome than using plain pointers, which on architectures I currently build for will always be 8 bytes. For the simple processors I can get eight times as much into the cache; for the others four times.
2021-01-17 19:38:23 -05:00
Thomas Harte
5f413a38df
Switches all American-style dates.
...
I'd failed to configure my new computer appropriately, it seems.
2021-01-16 22:09:19 -05:00
Thomas Harte
8860d0ff51
Starts to establish the CachingExecutor.
2021-01-16 22:06:16 -05:00
Thomas Harte
8bd471fa3c
Corrects recursive call.
2021-01-16 21:50:48 -05:00
Thomas Harte
cd6ac51aa6
Muddles along to generating functions.
...
Albeit right now without a body.
2021-01-16 21:45:44 -05:00
Thomas Harte
10caa1a1fb
Steps gingerly towards execution.
2021-01-16 20:51:02 -05:00
Thomas Harte
722e0068ca
Adds additional exposition.
2021-01-16 20:10:20 -05:00
Thomas Harte
8f2eea8819
Corrects AccessType::Read.
2021-01-16 20:04:48 -05:00
Thomas Harte
3b2d65fa16
Adds access type declaration.
2021-01-16 20:04:01 -05:00
Thomas Harte
3dc36b704a
Starts on the next piece: parsers.
2021-01-16 19:54:40 -05:00
Thomas Harte
37a20e125c
Completes the M50740 decoder.
...
Completely untested.
2021-01-15 22:47:52 -05:00
Thomas Harte
2910faf963
Adds missing #include.
2021-01-15 22:33:14 -05:00
Thomas Harte
321e10fffb
Adds 'InstructionSets' to the SDL and Qt projects.
2021-01-15 22:30:02 -05:00
Thomas Harte
1acb8c3c42
Completes the opcode map.
2021-01-15 22:24:37 -05:00
