Thomas Harte
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e061e849d4
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Had a second bash at the PLL. Probably I should read some of the literature.
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2016-07-27 16:24:24 -04:00 |
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Thomas Harte
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6afd619791
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Eliminated floating point arithmetic.
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2016-07-14 19:47:00 -04:00 |
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Thomas Harte
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6b4fec37ff
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Moved down to a single divide.
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2016-07-14 19:45:08 -04:00 |
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Thomas Harte
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481475a0f4
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Switched to a full-on linear regression. Which causes the current tests to pass.
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2016-07-14 19:42:01 -04:00 |
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Thomas Harte
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6d6b26b99f
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Actually made things worse.
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2016-07-14 07:32:27 -04:00 |
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Thomas Harte
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d8d3464c56
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Made a quick-hack attempt at PLL synchronisation. Which doesn't work.
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2016-07-14 07:31:23 -04:00 |
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Thomas Harte
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d1fe07f14d
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Added test of perfect DPLL input timing.
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2016-07-12 21:42:23 -04:00 |
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Thomas Harte
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94db45456e
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Started sketching out the basic form here, albeit that it doesn't yet do _the only thing it advertises itself as useful for_.
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2016-07-12 20:23:56 -04:00 |
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Thomas Harte
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75d95c0bc0
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Sketched out an interface for a digial PLL. Not persuaded yet. Baby steps.
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2016-07-11 22:12:58 -04:00 |
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